#ifndef __SYS_CONFIG_H
#define __SYS_CONFIG_H

#include <sys_define.h>

#define M36F_CHIP_MODE

#ifdef _BOARD_DB_M3811_01V01_
	#define SYS_MAIN_BOARD BOARD_DB_M3811_01V01
#elif defined _BOARD_DB_M3811_02V01_
	#define SYS_MAIN_BOARD BOARD_DB_M3811_02V01
    #define SMC1_SUPPORT 1
#elif defined _BOARD_DB_M3811_02V02_
	#define SYS_MAIN_BOARD BOARD_DB_M3811_02V02
#elif defined _BOARD_DB_M3805_01V01_
	#define SYS_MAIN_BOARD BOARD_DB_M3805_01V01
    #define SMC1_SUPPORT 1
#elif (defined( _BOARD_DB_M3601B_01V01_)||defined( _BOARD_DB_M3618_02V01_))
	#define SYS_MAIN_BOARD BOARD_DB_M3601B_01V01
	#define SUPPORT_TUN_AV2012 
    #define SMC2_SUPPORT 1 
	//#define MULTIFEED_SUPPORT
	//#define SUPPORT_UNICABLE
	//#define SUPPORT_DISEQC11
#elif defined _BOARD_DB_M3812_03V01_
    #define SYS_MAIN_BOARD BOARD_DB_M3812_03V01
    #define SMC2_SUPPORT 1 
#else
    #error "BOARD define error,please check!"
#endif

#ifdef _DVBC_ENABLE_
#define DVBC_SUPPORT 
#endif

#ifdef _IMG_2D_TO_3D_
#define IMG_2D_TO_3D
#endif

#ifdef _DVBS_ENABLE_
#define DVBS_SUPPORT 
#endif

//add for M3812 T2
#ifdef _DVBT2_ENABLE_
#define DVBT2_SUPPORT 
#endif

#ifdef _DVBT_ENABLE_
#define DVBT_SUPPORT 
#endif

#ifdef _ISDBT_ENABLE_
#define ISDBT_SUPPORT 
#endif

/*************************/
#ifdef  _CAS7_CA_ENABLE_ 

#define SUPPORT_CAS7
#define MULTI_CAS
#define CAS_TYPE	CAS_CONAX

#define DSC_SUPPORT
#define CAS7_PVR_SUPPORT 1
#define AUDIO_CHANNEL_LANG_SUPPORT
#define STO_PROTECT_BY_MUTEX

#define CAS7_PVR_SCRAMBLE //for single cpu original stream dmx2 playback, dual cpu not be verified now
#endif
/*************************/
#ifdef _EWS_INDONESIA_DEMO_
#define EWS_INDONESIA_DEMO
#endif

#define COMBOUI
#define GE_DRAW_OSD_LIB

#define TEMP_INFO_HEALTH

#define MULTIVIEW_SUPPORT
#ifdef DVBT_SUPPORT
#define SUPPORT_IRAN_CALENDAR
#define BIDIRECTIONAL_OSD_STYLE
#define ACCURATE_SSI_SQI //when return the accurate value of ssi/sqi 
#ifdef BIDIRECTIONAL_OSD_STYLE
#undef GE_DRAW_OSD_LIB	
#endif
#endif

#ifdef ISDBT_SUPPORT
#define ISDBT_CC		1
#define ISDBT_EPG
#define SUPPORT_WO_ONE_SEG  //has problem
#endif
#ifdef _WIFI_ENABLE_
	#define WIFI_SUPPORT
#endif	

#ifdef _DVBT_ENABLE_
#ifndef _BUILD_OTA_E_
//#define SUPPORT_FRANCE_HD
#endif
#endif

#ifdef _DVBT_ENABLE_
#ifndef _BUILD_OTA_E_
//#define POLAND_SPEC_SUPPORT 
#endif
#endif
#if (defined(DVBT_SUPPORT)||defined(ISDBT_SUPPORT))
#ifndef _BUILD_OTA_E_
#define AUTO_OTA
#endif
#endif

#ifdef AUTO_OTA
//#define NEW_MANUAL_OTA
#define France_HD_Network_ID  0x20FA  //for Fance TNT spec check the network
#endif

#if (defined(POLAND_SPEC_SUPPORT)||defined(AUTO_OTA)||defined(SUPPORT_FRANCE_HD))
#define SUPPORT_TP_QUALITY 
#endif

//#define EWS_FUNCTION

/* OTA Setting */
#define OTA_CONTROL_FLOW_ENHANCE
#define SYS_OUI					0x090E6
#define SYS_HW_MODEL           0x3811
#define SYS_HW_VERSION	        0x0000
#define SYS_SW_MODEL          0x0000
#define SYS_SW_VERSION        0x0000
#ifdef AUTO_OTA
//#define AUTO_OTA_SAME_VERSION_CHECK
#endif
#ifdef _MAC_TEST
//#define MAC_TEST
#endif

//-----------------------------------------------------------------
/*Gavim@20150128*/
#define Maker_GUI					SYS_FUNC_ON
#define Maker_GUI_ON				SYS_FUNC_ON
#define Maker_GUI_OFF				SYS_FUNC_OFF
#define Maker_GUI_TEST				SYS_FUNC_ON

#define Maker_GUI_Frame_H				568
#define Maker_GUI_Frame_W				866//866
#define Maker_GUI_MM_L					74
#define Maker_GUI_MM_T					30
#define Maker_GUI_MM_W					866//866
#define Maker_GUI_MM_H					95
#define Maker_GUI_SM_L					74
#define Maker_GUI_SM_T					185
#define Maker_GUI_SM_W					866//866
#define Maker_GUI_SM_H					353//383
#define Maker_PRO_BAR_PRE			4

//-----------------------------------------------------------------

#ifndef _BUILD_OTA_E_
#if((defined _RD_DEBUG_) &&(defined DVBT_SUPPORT))
#define NIM_REG_ENABLE
#endif
#endif

#ifdef _REG_ENABLE
#define REG_ENABLE
#endif
//modify for adding welcome page when only open dvbt 2011 10 19
#if (defined (DVBT_SUPPORT) || defined (ISDBT_SUPPORT)||defined (DVBC_SUPPORT ))
#define SHOW_WELCOME_FIRST
#endif
//modify end
#if defined ISDBT_SUPPORT || defined DVBT_SUPPORT
#define _DTGSI_ENABLE_
#if (defined(_DTGSI_ENABLE_))
#define SI_MODULE_CONFIG   // for DTG SI specification config in the si_config.h
#define LCN_VAR_RANGE 900
#endif

//add for M3812 T2
#if defined(DVBT2_SUPPORT)
    //!if use MN88473,pls modify the makefile(\src\lld\nim\dvbt2),it's default compile the  MN88472 module
    #define SYS_DVBT_DEMO_MODULE    CXD2837 //MN88472,SHARP6158
    #define SYS_TUN_MODULE            CXD2861//MXL603,MXL301
    #if ((SYS_DVBT_DEMO_MODULE == CXD2837) || (SYS_DVBT_DEMO_MODULE == MN88473))
    #define DVBT2_LITE_SUPPORT	//Support DVB-T2-Lite channels(Version 1.3.1 only) 
	#endif
    //For avoid the limit of SCB_I2C driver that per I2C commond can not exceed 16 bytes,
    //set up to use GPIO_I2C mode instead of SCB_I2C mode.
	#define I2C_SCB0_RUN_WITH_GPIO_I2C_MODE	

#if (SYS_TUN_MODULE == CXD2861)
#define DVBT2_1_7M_5M_SUPPORT   //CXD2861 tuner support 1.7MHZ and 5MHZ bandwidth.
#endif
#elif defined(DVBT_SUPPORT) 
#define SYS_DVBT_DEMO_MODULE  MXL101  //DB3805 external fullnim
//#define SYS_DVBT_DEMO_MODULE COFDM_M3101 //DB3805 external fullnim

//Martin@20150324_Support_MXL603
#if defined(ISDBT_SUPPORT)
    #if(AOV_TUN_MODULE == TUNER_MXL603)
    	#define SYS_TUN_MODULE          MXL603
	#elif(AOV_TUN_MODULE == TUNER_MXL5007)
    	#define SYS_TUN_MODULE          MXL5007
	#endif
#endif
//----End Martin

#endif

#define _LCN_ENABLE_

/* FRANCE_HD TNT Related Define */
#define HD_SERVICE_TYPE_SUPPORT  //support the HD service type in the SDT
#define DATABRODCAST_SERVICE_TO_TV  //support databroadcast service change type to TV service
#define PRIVATE_DATA_SPEC INVALID_PRIVATE_DATA_SPEC // remove the private data specification check

#endif

#ifndef DVBS_SUPPORT
#define PARENTAL_SUPPORT //open feature of partetal rating control
#define RATING_LOCK_WITH_PASSWORD
#define AGE_LIMIT_FEATURE
#endif
#define CSA_PARENTAL_CONTROL //With definition: user have 4 class of rating level to set: 10, 12, 16, 18 years.
                                                      // (TNT_CSA only with the 4class of rating level : 10, 12, 16, 18 years)
                                                      //without definition: 4,5,6,...~18 years.(spec in EN300468)

//#define SMC1_SUPPORT	// First SmartCard
//#define SMC2_SUPPORT	// Second SmartCard
#define PMU_ENABLE
#ifdef PMU_ENABLE
//#define PMU_POWERSTANDBY_CLOSE
#endif

#define RTC_TIME_SUPPORT //C3811 PMU RTC

#ifndef _BUILD_OTA_E_
//#define USB_LOGO_TEST
#endif

#define ATSC_SUBTITLE_SUPPORT
//#define AUTO_SYANDBY_DEFAULT_ON
//#define ALI_SHUTTLE_MODIFY
#define UI_MEDIA_PLAYER_REPEAT_PLAY
//#define TVE_USE_FULL_CURRENT_MODE
#define WATCH_DOG_SUPPORT
//#define DO_DDP_CERTIFICATION
//#define AFD_SW_SUPPORT
//#define AFD_HW_SUPPORT
#if( defined (AFD_SW_SUPPORT)) || ( defined(AFD_HW_SUPPORT))
#define SUPPORT_AFD_PARSE
#define SUPPORT_AFD_SCALE
#define SUPPORT_AFD_WSS_OUTPUT
#endif
//#define SLOW_PLAY_BEFORE_SYNC

#define PVR_DYNAMIC_PID_CHANGE_TEST	//dynamic v-pid change for h264<->mpg2
#ifndef _BUILD_OTA_E_
#define FAST_CHCHG_TEST  // send CC cmd to PUB, then open win_progname_bar and update prog info
#endif
//#define FULL_SCREEN_CVBS//when pass video criterion ,it will affect chroma and luminace,need to close it
/* Add "RAM_TMS_TEST" for test: doing timeshift using RAM disk. 
 * If open it, MUST re-define "RAM_DISK_ADDR" and "RAM_DISK_SIZE".
 */
//#define RAM_TMS_TEST 

#ifdef _SFU_TEST_SUPPORT
#define SFU_TEST_SUPPORT
#endif


#define BOARD_S3602F_MAX    (BOARD_SB_S3602F_QFP_01V01 + 100)

#ifndef _SUPPORT_64M_MEM_MINI
//#define DUAL_VIDEO_OUTPUT_USE_VCAP
#define HDMI_TV_TEST
#else
#define DISABLE_MP_PVR
#define SCART_RGB_UNSUPPORT
#define SCART_CVBS_SUPPORT
#endif

//#define DISABLE_USB
#ifdef DISABLE_USB
#define DISABLE_MP_PVR
#endif
//#define DEO_VIDEO_QUALITY_IMPROVE
#define HDMI_1080P_SUPPORT
#define HDMI_ENABLE     //  enable HDMI in vpo driver because sabbat ui cannot disable it.
#define DRAM_SPLIT
#define OSD_16BIT_SUPPORT
#define OSD_VSRC_SUPPORT
#ifdef _SUPPORT_64M_MEM
#define FONT_1BIT_SUPPORT  // for reduce memory 
#ifdef ISDBT_SUPPORT // M3S11
// for M3S11 64M reduce memory
#define SEVERAL_LANG_SUPPORT
#define LIB_GE_OSD_CMD_SIZE_REDUCE
#define PVR_VOB_BUF_REDUCE    
#define ARABIC_CONVERT_NOT_SUPPORT
// for M3S11 64M not support 1080P_50/1080P_60
#define TVMODE_SEVERAL_NOT_SUPPORT
#define SUPPORT_TUN_MXL603//Martin@20150324_Support_MXL603
#define SUPPORT_TUN_MXL5007//Martin@20150324_Support_MXL603
#endif
#endif
#define USB_SUPPORT_HUB
#define VIDEO_DEBLOCKING_SUPPORT
#define GE_SIMULATE_OSD
#define AUDIO_DESCRIPTION_SUPPORT	
#ifndef _BUILD_OTA_E_	
	//#define CEC_SUPPORT
	//#define HDMI_CERTIFICATION_UI
#endif

#define AV_DELAY_SUPPORT
#ifdef OSD_16BIT_SUPPORT
//#define SUPPORT_DRAW_EFFECT
#else
#define HDOSD_DEO_OUTPUT
#endif

#ifdef WIFI_SUPPORT
	#define SYS_NETWORK_MODULE 	NET_ALIETHMAC
	#define USB_DRIVER_WIFI_SUPPORT
	#define NETWORK_SUPPORT
#else	
	#define SYS_NETWORK_MODULE 	NET_ALIETHMAC
#endif	

#define SHOW_TWO_TUNER_LOCK_STATUS

//#define SDIO_SUPPORT


#ifdef _SHOW_ALI_DEMO_ON_SCREEN
#define SHOW_ALI_DEMO_ON_SCREEN
#endif

#ifdef _SATA_SUPPORT
#define SATA_SUPPORT
#endif

#define SUPPORT_MPEG4_TEST
#define MP_SUBTITLE_SUPPORT
#define FS_STDIO_SUPPORT
#define RAM_DISK_SUPPORT

#define HDCP_IN_FLASH
//#define HDCP_FROM_CE

#define UNIFIED_CI_PATCH
#define AUTOMATIC_STANDBY

#define PVR3_SUPPORT
#define NEW_EPG_ARCH
#define ISO8859_SUPPORT
#define SYS_AGC_SNR_API
#define SYS_TUN_MODULE_UNIFIED_API 
#define MULTI_AUDIO_PID
#define M3327SW_AUTOSCAN
#define TUNER_OPTION_IX2410
#define DUP_TRANSPONDER_REMOVAL 	1
#define SYS_PSEARCH_SCAN_TP_ALL		SYS_FUNC_ON
#define SYS_PROJECT					SYS_DEFINE_NULL
#define SYS_PROJECT_SM				SYS_DEFINE_NULL
#define SYS_OS_MODULE				ALI_TDS2
#define SYS_MW_MODULE				SYS_DEFINE_NULL
#define SYS_CA_MODULE				SYS_DEFINE_NULL
#define SYS_EPG_MODULE				SYS_DEFINE_NULL
#define SYS_CHIP_MODULE				ALI_S3602
#define SYS_CPU_MODULE				CPU_MIPS24KE
#define SYS_CPU_ENDIAN				ENDIAN_LITTLE
#define SYS_CHIP_CLOCK				27000000
#define SYS_GPIO_MODULE				M6303GPIO
#define SYS_I2C_MODULE				M6303I2C
#define SYS_I2C_SDA					3
#define SYS_I2C_SCL					4
#define SYS_SCI_MODULE				UART16550
#define SYS_TSI_MODULE				M3327TSI
#define SYS_FLASH_BASE_ADDR			0xafc00000
#define SYS_FLASH_SIZE				0x400000
#define SYS_DMX_MODULE				M3327DMX
#define SYS_LNB_POWER_OFF			SYS_FUNC_ON
#define SYS_RFM_BASE_ADDR			0xca
#define SYS_IRP_MOUDLE				ROCK00
#define TABLE_BLOCK_SPACE_SIZE		(64 * 1024)
#ifdef _INVW_JUICE
#define MAX_PROG_NUM				1000
#else
#define MAX_PROG_NUM				5000
#endif
#define MAX_TP_NUM					3000
#define MAX_SAT_NUM					65 //64 

//modify for TTX and EPG share buffer 2011 10 10
/****ttx macro*********/
#ifdef _SUPPORT_64M_MEM
//#define TTX_EPG_SHARE_MEM
#endif

//reduce the space for ota
#ifndef _BUILD_OTA_E_	
#if (ISDBT_CC != 1)
#define TTX_ON						1
#endif
#define SUBTITLE_ON					1
#else
#define TTX_ON						0
#define SUBTITLE_ON					0
#endif

#define TTX_BY_OSD
#define ALL_BY_VBI
#define TTX_BY_VBI
#define TTX_COLOR_NUMBER			256
#define DECODE_LIB_MAD				1
#define DECODE_LIB					DECODE_LIB_MAD
#define VDEC_AV_SYNC
#define COLOR_N						256
#define LOCAL_VSCR					0
#define OSD_VSCREEN					LOCAL_VSCR
#define OSD_MAX_WIDTH				1008
#define OSD_MAX_HEIGHT				640
#define LIST_SUPPORT				1
#define MATRIXBOX_SUPPORT			1
#define USB_MP_SUPPORT
#define ISO_5937_SUPPORT
#define DB_USE_UNICODE_STRING
#define NEW_DISEQC_LIB
#define OSD_STARTCOL				((1280 - OSD_MAX_WIDTH)>>1)
#define OSD_STARTROW_N				((720 - OSD_MAX_HEIGHT)>>1)
#define OSD_STARTROW_P				((720 - OSD_MAX_HEIGHT)>>1)
#define AC3DEC						1
#define PSI_MONITOR_SUPPORT
#define TTX_GREEK_SUPPORT
#define TTX_ARABIC_SUPPORT 
#define TTX_ARABIC_G2_SUPPORT
#define TTX_CYRILLIC_1_SUPPORT
#define TTX_CYRILLIC_2_SUPPORT
#define TTX_CYRILLIC_3_SUPPORT
#define TTX_HEBREW_SUPPORT
#define TTX_CYRILLIC_G2_SUPPORT
#define TTX_GREEK_G2_SUPPORT
#define TTX_G3_SUPPORT


#define DB_VERSION					40
#define ALI_SDK_API_ENABLE


#define GPIO_NULL 127
#ifndef _BUILD_OTA_E_	
#ifdef ISDBT_SUPPORT
#define CC_ON 0
#else
#define CC_ON 1
#endif
#else
#define CC_ON 0
#endif
#if(CC_ON ==1)
#define CC_BY_OSD	//vicky20110118
#define CC_BY_VBI
#define CC_MONITOR_CS	//vicky20110210
#define CC_MONITOR_CC	//vicky20110216
//End
#endif


#define TRUE_COLOR_HD_OSD
//#define SD_PVR
#define PVR_FS_SH
#define HD_SUBTITLE_SUPPORT
#ifndef SD_PVR
//#define HD_SUBTITLE_SUPPORT
#endif
#define HDTV_SUPPORT
#define SUPPORT_DUAL_OUTPUT_ONOFF   0
#define DISPLAY_SETTING_SUPPORT

#ifdef SD_PVR
	#ifdef DUAL_VIDEO_OUTPUT
#undef DUAL_VIDEO_OUTPUT
	#endif
	#ifdef DUAL_VIDEO_OUTPUT_USE_VCAP
#undef DUAL_VIDEO_OUTPUT_USE_VCAP
	#endif	
#endif

#ifndef DUAL_VIDEO_OUTPUT_USE_VCAP
    #define VIDEO_OUTPUT_SD_WHILE_NO_HDMI
#endif	

#define TTX_SUB_PAGE
#define SUPPORT_PACKET_26

//not in M3327.mdf
#define LIB_TSI3_FULL
#define ENABLE_SERIAL_FLASH
#define SUPPORT_ERASE_UNKOWN_PACKET //for ttx


#if  defined(_CAS7_CA_ENABLE_)
	#undef SYS_PROJECT_SM
	#define SYS_PROJECT_SM				PROJECT_SM_CA

	#ifdef SDIO_SUPPORT
	#undef SDIO_SUPPORT
	#endif

	#ifdef AV_DELAY_SUPPORT
	#undef AV_DELAY_SUPPORT
	#endif

#endif

#if (SYS_PROJECT_SM ==PROJECT_SM_CI)
#define CONFIG_SLOT_NUM	2//1,2
#define CI_SLOT_NS		CONFIG_SLOT_NUM
#define CI_SUPPORT 
//#define SYS_PIN_MUX_MODE_04  
#endif


#ifndef _BUILD_OTA_E_
#define DVR_PVR_SUPPORT 
#define USB_MP_SUPPORT
#define RECORD_SUPPORT 
#define USB_SAFELY_REMOVE_SUPPORT
#define USB_UPGRADE_SUPPORT_LONG_FILENAME
#define DVR_PVR_SUPPORT_SUBTITLE    1
#else
	#undef USB_MP_SUPPORT
#endif


#define SYS_OS_TASK_NUM			128
#define SYS_OS_SEMA_NUM			512
#define SYS_OS_FLAG_NUM			256
#define SYS_OS_MSBF_NUM			64
#define SYS_OS_MUTX_NUM			512


#ifdef HDTV_SUPPORT

//#define H264_SUPPORT_MULTI_BANK
#define MAX_EXTRA_FB_NUM 3
#ifndef SD_PVR
    #define MAX_MB_WIDTH 120 //(1920/16)
    #define MAX_MB_HEIGHT 68 //(1088/16)
#else
    #define MAX_MB_WIDTH 46//45 //(720/16)
    #define MAX_MB_HEIGHT 36//36 //(576/16)
#endif

#ifdef H264_SUPPORT_MULTI_BANK
    #ifndef SD_PVR
        #define MAX_MB_STRIDE 120 //120 MB alignment to improve AVC performance
    #else
        #define MAX_MB_STRIDE 46//46 //120 MB alignment to improve AVC performance
    #endif
#define EXTRA_FB_SIZE 0x2000
#define ONE_FB_SIZE (((MAX_MB_STRIDE*MAX_MB_HEIGHT*256*3/2+EXTRA_FB_SIZE-1)&0xffffe000)+EXTRA_FB_SIZE)
#else
    #ifndef SD_PVR
        #define MAX_MB_STRIDE 120 //120 MB alignment to improve AVC performance
    #else
        #define MAX_MB_STRIDE 46//46 //120 MB alignment to improve AVC performance
    #endif
    
    #ifdef SD_PVR 
        #define one_frm_y_size 		(MAX_MB_STRIDE*((MAX_MB_HEIGHT+1)/2)*512)
        #define one_frm_c_size   (MAX_MB_STRIDE*((((MAX_MB_HEIGHT+1)/2)+1)/2)*512)   
        #define ONE_FB_SIZE (one_frm_y_size + one_frm_c_size)
    #else
        #define ONE_FB_SIZE (MAX_MB_STRIDE*MAX_MB_HEIGHT*256*3/2)
    #endif

#endif

#define ONE_DV_FB_SIZE ((MAX_MB_WIDTH*MAX_MB_HEIGHT*256*3/2)/4)
#define ONE_MV_SIZE 64*(MAX_MB_WIDTH*MAX_MB_HEIGHT) //522240

#ifndef SD_PVR
#define AVC_FB_LEN		ONE_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0x1700000
#define AVC_DVIEW_LEN   ONE_DV_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0xb00000
#define AVC_MV_LEN		ONE_MV_SIZE*(4+MAX_EXTRA_FB_NUM) //0x37c800//0x2FD000
#else
#define const_frm_num   5
#define AVC_FB_LEN		ONE_FB_SIZE*(const_frm_num+MAX_EXTRA_FB_NUM) //0x1700000
#define AVC_DVIEW_LEN   0//  ONE_DV_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0xb00000
#define AVC_MV_LEN		ONE_MV_SIZE*(const_frm_num+MAX_EXTRA_FB_NUM) //0x37c800//0x2FD000
#endif

#ifndef SD_PVR
#define AVC_MB_COL_LEN		0x22000 //0x11000
#endif
#define AVC_MB_NEI_LEN		0x20000
#define AVC_CMD_QUEUE_LEN 0x10000 //In allegro test stream, this length could be bigger than 128k, however, in realistic, 0x10000 should be enough
#define AVC_LAF_RW_BUF_LEN ((MAX_MB_WIDTH*MAX_MB_HEIGHT)*32*2*2)
//#define AVC_LAF_FLAG_BUF_LEN (0xc00*21)
#define AVC_LAF_FLAG_BUF_LEN (0xc00*22) //when enable dual output, we need 1 more laf buffer

#ifndef SD_PVR
    #define AVC_VBV_LEN		0x400000 // for CI+, must use 4MB. if this size is set to 0x200000, vbv buffer overflow could happen in 20061007d_0.ts
#endif

#endif

/* Add "PNG_GIF_TEST" for test: If open it, PNG/GIF images can display on OSD".
 * Add "PIP_PNG_GIF" for test:
 * if open it, When full screen playing live stream, press a "PIP" key, 
 * it will show a GIF file in OSD, press "PIP" key again, it will disappear,
 * but some animated GIF pictures will not display . 
 * and this two define can not open at the same time
 */
//#define PNG_GIF_TEST
//#define PIP_PNG_GIF

/************************************************************
open Antiflicker
**************************************************************/
//#define ENABLE_ANTIFLICK


/************************************************************
other ui and ap use macro
**************************************************************/
#if (SYS_MAIN_BOARD == BOARD_DB_M3805_01V01)
#define SUPPORT_TWO_TUNER	
#endif	

#define GLOBAL_MOTOR_ANTENNA_SETTING
#ifndef SUPPORT_TWO_TUNER
#define SELECT_SAT_ONLY
#endif
#define SEARCH_DEFAULT_FTAONLY 0
#define DISK_MANAGER_SUPPORT

#define EPG_MULTI_TP
//#if defined(SUPPORT_FRANCE_HD)
#define EPG_OTH_SCH_SUPPORT
//#endif
#define _EPG_MULTI_SERVICE
#define GET_TOTAL_SCH_EPG
#define EPG_FAST_PARSE
#define EPG_NETWORK_PATCH
#define SUPPORT_POP_SUBT
//#define TRANSFER_FORMAT2_SUPPORT  // consistent with bootloader for P2P upgrade
//#define MULTI_CAS

#if (defined(DVBC_SUPPORT) || defined(DVBS_SUPPORT) || defined(DVBT_SUPPORT) || defined(DVBT2_SUPPORT) || defined(ISDBT_SUPPORT))
#define AUTO_UPDATE_TPINFO_SUPPORT
#endif
/* OTA data backup */
#define OTA_POWEROFF_SAFE
#define OTA_START_BACKUP_FLAG	0xFF
#define OTA_START_END_FLAG	0xFE
#define BACKUP_START_FLAG	0x55aa5a5a

#define AUDIO_DEF_CH_L				0x00
#define AUDIO_DEF_CH_R				0x01	
#define AUDIO_DEF_CH_STEREO			0x02
#define AUDIO_DEF_CH_MONO			0x03

#define DEFAULT_AUDIO_CHANNEL		AUDIO_DEF_CH_STEREO


#define MEDIA_PLAYER_VIDEO_SUPPORT

// for video decoder
#define __MM_MPG_DEC_START_ADDR     (__MM_OSD_START_ADDR + __MM_OSD_LEN)
#define __MM_MPG_DEC_LEN            (__MM_VBV_START_ADDR - __MM_MPG_DEC_START_ADDR)
#define SYSTEM_BUF_BLOCK_SIZE		2324
#define SYSTEM_BUF_MAX_BLOCK		4

#define DB_RAM_BACKUP

#define NEW_DEMO_FRAME

#ifdef NEW_DEMO_FRAME
  #define DB_PIP_SPE_USE
#else
// for ChChg TSG player
#define CC_USE_TSG_PLAYER
// define these 2 macro just for pass compile under NEW_DEMO_FRAME
#define CI_SEND_CAPMT_OK_TO_APP
//#define CI_SLOT_DYNAMIC_DETECT
#endif

#ifdef NETWORK_SUPPORT
	#ifndef SYS_NETWORK_MODULE
		#define SYS_NETWORK_MODULE		SMSC9220	//NET_ENC28J60
	#endif
	
	#if (SYS_NETWORK_MODULE == NET_ENC28J60)
		#define STO_PROTECT_BY_MUTEX
	#endif
#endif

//#define IDE_SUPPORT

#define MULTI_PARTITION_SUPPORT
#define MULTI_VOLUME_SUPPORT

#define MP_SPECTRUM			//support MP3 spectrum
#define OGG_36
#define OSDLAYER_CONFIG

//#define SUPPORT_DEO_HINT
#define DTG_CHAR  //for spec char display
#define GB2312_SUPPORT //to show CCTV5...

#ifdef _SUPPORT_64M_MEM
#define SYS_SDRAM_SIZE  64
#define ONE_RECODER_PVR
#else
#define SYS_SDRAM_SIZE  128
#endif

// Some logic blocks
#if ( SYS_SDRAM_SIZE == 2 )

#elif ( SYS_SDRAM_SIZE == 4 )

#elif (SYS_SDRAM_SIZE == 16)

#elif (SYS_SDRAM_SIZE == 32)

#elif (SYS_SDRAM_SIZE == 64)

#define SYS_DEM_MODULE          COFDM_S3811

#if defined (_BOARD_DB_M3812_03V01_)
    #define SYS_TUN_MODULE      CXD2861//MXL603
//Martin@20150324_Support_MXL603
#elif defined (_BOARD_DB_M3811_01V01_)
#if(AOV_TUN_MODULE == TUNER_MXL603)
    	#define SYS_TUN_MODULE          MXL603 
	#elif(AOV_TUN_MODULE == TUNER_MXL5007)
    	#define SYS_TUN_MODULE          MXL5007 
	#endif
//----End Martin
#else
    #define SYS_TUN_MODULE      ANY_TUNER //MXL136 MXL603 MXL5007 IX2410 NM120 RT820T
#endif

#ifdef DVBT_SUPPORT 
#undef ONE_RECODER_PVR
#endif

#ifdef GE_DRAW_OSD_LIB
#undef GE_DRAW_OSD_LIB
#endif

#ifdef ISDBT_SUPPORT // M3S11

#ifdef AUDIO_DESCRIPTION_SUPPORT
#undef AUDIO_DESCRIPTION_SUPPORT
#endif

#ifndef _SUPPORT_64M_MEM_MINI
#ifdef HD_SUBTITLE_SUPPORT
//#undef HD_SUBTITLE_SUPPORT
#endif
#endif

#ifdef ISDBT_CC
#define ISDBT_CC_DECREASED_SIZE
#endif

#ifdef MULTIVIEW_SUPPORT
#undef MULTIVIEW_SUPPORT
#endif

#ifdef GB2312_SUPPORT
#undef GB2312_SUPPORT //reduce the memory for M3S11 64M
#endif
#endif

#ifdef CC_ON
#undef CC_ON
#undef CC_BY_OSD	//vicky20110118
#undef CC_BY_VBI
#undef CC_MONITOR_CS	//vicky20110210
#undef CC_MONITOR_CC	//vicky20110216
#endif

#if (CC_ON==1)
#define OSD_CC_WIDTH   	  576//480//480//704//480//(CC_CHAR_W*40+16)//560//704(16bytes aligned)
#define OSD_CC_HEIGHT  	  390//360//300//360//300//450//(CC_CHAR_H*15)//500//570
#define CC_CHAR_HEIGHT		26

#define __MM_ATSC_CC_PB_RECT_LEN (OSD_CC_WIDTH*OSD_CC_HEIGHT)
#define __MM_ATSC_CC_PB_LEN  (__MM_ATSC_CC_PB_RECT_LEN+OSD_CC_WIDTH*4*CC_CHAR_HEIGHT)
#define __MM_ATSC_CC_BS_LEN  0x2c00 // 1K Word CC Data, 1K Byte CC Field, 2K Word DTVCC Data
//#define __MM_SUBT_ATSC_SEC_LEN	0x400	// 1KB  

#else
#undef __MM_ATSC_CC_PB_LEN
#undef __MM_ATSC_CC_BS_LEN
#define __MM_ATSC_CC_PB_LEN	0
#define __MM_ATSC_CC_BS_LEN	0
#endif


#ifdef MP_PREVIEW_SWITCH_SMOOTHLY
#undef MP_PREVIEW_SWITCH_SMOOTHLY
#endif
#ifdef CHANCHG_VIDEOTYPE_SUPPORT
#undef CHANCHG_VIDEOTYPE_SUPPORT
#endif
#ifdef NETWORK_SUPPORT
#undef NETWORK_SUPPORT
#endif

#define AVC_MEM_LEN		0x15bb000//0x1898400

#define __MM_VOID_BUFFER_LEN	0x00000000
#define __MM_FB_LEN_DEVIDED	    0X32A000//(HD:1920X1152X1.5)
#ifdef VIDEO_DEBLOCKING_SUPPORT
#define __MM_FB_LEN			    0x10CF200//0x19c6200
#else
#define __MM_FB_LEN			    0xdd2200//0XCA8000//0X9B4000//0X26D000//(16*SD>3*HD)
#endif
#define __MM_MAF_LEN			0x198C00//0xd0000//0X3000//((FLAG==4*4*3K) + VALUE ==120*72*32 *2(Y+C)>46*36*32 *2(Y+C) *4 )
#define __MM_DVW_LEN			0
#define __MM_VBV_LEN			0x12C000//(HD = 8*SD > 4*SD)

//#define SD_PVR //to support 64M with SD pvr

#define __MM_HIGHEST_ADDR  		0xa4000000		//64
#define __MM_VOID_BUFFER_ADDR	(__MM_HIGHEST_ADDR - __MM_VOID_BUFFER_LEN)	
#define __MM_FB_TOP_ADDR		__MM_VOID_BUFFER_ADDR	//64MB
#define __MM_VBV_START_ADDR		((__MM_FB_TOP_ADDR - __MM_VBV_LEN)&0XFFFFFF00)
#define __MM_MAF_START_ADDR			((__MM_VBV_START_ADDR - __MM_MAF_LEN)&0XFFFFFC00)
#define __MM_FB_START_ADDR			((__MM_MAF_START_ADDR - __MM_FB_LEN)&0XFFFFFF00)


// for satcodx memmap
#define __MM_DVW_START_ADDR			((__MM_FB_START_ADDR)&0XFFFFFFF0)
// end: mpeg2 decoder

// begin: h264 decoder
#define MAX_EXTRA_FB_NUM 3
#ifndef SD_PVR
    #define MAX_MB_WIDTH 120 //(1920/16)
    #define MAX_MB_HEIGHT 68 //(1088/16)
#else
    #define MAX_MB_WIDTH 46//45 //(720/16)
    #define MAX_MB_HEIGHT 36//36 //(576/16)
#endif

#ifdef H264_SUPPORT_MULTI_BANK
    #ifndef SD_PVR
        #define MAX_MB_STRIDE 120 //120 MB alignment to improve AVC performance
    #else
        #define MAX_MB_STRIDE 46//46 //120 MB alignment to improve AVC performance
    #endif
#define EXTRA_FB_SIZE 0x2000
#define ONE_FB_SIZE (((MAX_MB_STRIDE*MAX_MB_HEIGHT*256*3/2+EXTRA_FB_SIZE-1)&0xffffe000)+EXTRA_FB_SIZE)
#else
    #ifndef SD_PVR
        #define MAX_MB_STRIDE 120 //120 MB alignment to improve AVC performance
    #else
        #define MAX_MB_STRIDE 46//46 //120 MB alignment to improve AVC performance
    #endif
    
    #ifdef SD_PVR 
        #define one_frm_y_size 		(MAX_MB_STRIDE*((MAX_MB_HEIGHT+1)/2)*512)
        #define one_frm_c_size   (MAX_MB_STRIDE*((((MAX_MB_HEIGHT+1)/2)+1)/2)*512)   
        #define ONE_FB_SIZE (one_frm_y_size + one_frm_c_size)
    #else
        #define ONE_FB_SIZE (MAX_MB_STRIDE*MAX_MB_HEIGHT*256*3/2)
    #endif

#endif

#define ONE_DV_FB_SIZE ((MAX_MB_WIDTH*MAX_MB_HEIGHT*256*3/2)/4)
#define ONE_MV_SIZE 32*(MAX_MB_WIDTH*MAX_MB_HEIGHT) //522240

#ifndef SD_PVR
#define AVC_FB_LEN		ONE_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0x1700000
#define AVC_DVIEW_LEN   ONE_DV_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0xb00000
#define AVC_MV_LEN		ONE_MV_SIZE*(4+MAX_EXTRA_FB_NUM) //0x37c800//0x2FD000
#else
#define const_frm_num   5
#define AVC_FB_LEN		ONE_FB_SIZE*(const_frm_num+MAX_EXTRA_FB_NUM) //0x1700000
#define AVC_DVIEW_LEN   0//  ONE_DV_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0xb00000
#define AVC_MV_LEN		ONE_MV_SIZE*(const_frm_num+MAX_EXTRA_FB_NUM) //0x37c800//0x2FD000
#endif

#define AVC_MB_COL_LEN		0x15000//0x22000 //0x11000
#define AVC_MB_NEI_LEN		0xf000
#define AVC_CMD_QUEUE_LEN   0x10000 //In allegro test stream, this length could be bigger than 128k, however, in realistic, 0x10000 should be enough
#undef  AVC_LAF_RW_BUF_LEN
//#define AVC_LAF_RW_BUF_LEN ((MAX_MB_WIDTH*MAX_MB_HEIGHT)*32*2*2)
#define AVC_LAF_RW_BUF_LEN (((((MAX_MB_WIDTH*MAX_MB_HEIGHT)*48*2)+1023)&0x0ffffc00)*2)

//#define AVC_LAF_FLAG_BUF_LEN (0xc00*21)
#define AVC_LAF_FLAG_BUF_LEN (0xc00*22) //when enable dual output, we need 1 more laf buffer

#ifdef AVC_VBV_LEN
#undef AVC_VBV_LEN
#endif

#ifndef SD_PVR
    #define AVC_VBV_LEN		0x380000 //for CI+, must use 4MB. if this size is set to 0x200000, vbv buffer overflow could happen in 20061007d_0.ts
#else
    #define AVC_VBV_LEN		0x180000 
#endif

// end: h264 decoder

#define AVC_SUPPORT_UNIFY_MEM

#ifndef AVC_SUPPORT_UNIFY_MEM
/*AVC buffer allocation*/
#define AVC_VBV_ADDR 		(__MM_FB_TOP_ADDR - AVC_VBV_LEN) 	//256 bytes alignment
#define AVC_FB_ADDR 		((AVC_VBV_ADDR -  AVC_FB_LEN )&0xfffffe00)   		//512 bytes alignment
#define AVC_DVIEW_ADDR 		((AVC_FB_ADDR -  AVC_DVIEW_LEN)&0xfffffe00) 	//512 bytes alignment
#define AVC_CMD_QUEUE_ADDR  		((AVC_DVIEW_ADDR - AVC_CMD_QUEUE_LEN)&0xffffff00)  	//256 bytes alignment
#define AVC_MV_ADDR 		((AVC_CMD_QUEUE_ADDR - AVC_MV_LEN)&0xffffff00)  		//256 bytes alignment
#define AVC_MB_COL_ADDR 	((AVC_MV_ADDR - AVC_MB_COL_LEN)&0xffffff00) 		//256 bytes alignment
#define AVC_MB_NEI_ADDR 	((AVC_MB_COL_ADDR - AVC_MB_NEI_LEN)&0xffffff00) 	//256 bytes alignment
#define AVC_LAF_FLAG_BUF_ADDR 		((AVC_MB_NEI_ADDR - AVC_LAF_FLAG_BUF_LEN)&0xfffffc00)  //1024 bytes alignment
#define AVC_LAF_RW_BUF_ADDR   ((AVC_LAF_FLAG_BUF_ADDR - AVC_LAF_RW_BUF_LEN)&0xfffffc00)  //1024 bytes alignment
#else

#define AVC_VBV_ADDR 				((__MM_FB_TOP_ADDR - AVC_VBV_LEN )&0xffffff00) 	//256 bytes alignment
#define AVC_CMD_QUEUE_ADDR  		((AVC_VBV_ADDR - AVC_CMD_QUEUE_LEN)&0xffffff00)  	//256 bytes alignment
#define AVC_MB_COL_ADDR 		    ((AVC_CMD_QUEUE_ADDR - AVC_MB_COL_LEN - AVC_MV_LEN)&0xffffff00)  		//256 bytes alignment
//#define AVC_MB_COL_ADDR 			((AVC_CMD_QUEUE_ADDR - AVC_MB_COL_LEN)&0xffffff00) 		//256 bytes alignment
#define AVC_MB_NEI_ADDR 			((AVC_MB_COL_ADDR - AVC_MB_NEI_LEN)&0xffffff00) 	//256 bytes alignment
#define AVC_MEM_ADDR 				((AVC_MB_NEI_ADDR - AVC_MEM_LEN)&0xffffff00)

#define AVC_DVIEW_ADDR 				0
#define AVC_MV_ADDR 				0
#define AVC_LAF_RW_BUF_ADDR   		0
#define AVC_LAF_FLAG_BUF_ADDR 		0
#define AVC_FB_ADDR					0
#endif


#define __MM_GMA1_LEN			0 // 0x1FA400 // 1920*1080 osd layer1  		
#define __MM_GMA2_LEN			0 // 0x1FA400//1920*1080  osd layer2
#define __MM_TEMP_BUF_LEN		0 // 0x100 //1920*1080*4 temp resize buffer
#define __MM_CMD_LEN			0 // 0x6DB0 // command buffer
#define __MM_GE_LEN			    (__MM_GMA1_LEN+__MM_GMA2_LEN+__MM_TEMP_BUF_LEN+__MM_CMD_LEN) //0xBE45B0
#define __MM_OSD_LEN			0x65400 // 720*576

#ifdef MULTIVIEW_SUPPORT
#define __MM_OSD1_LEN           (1280*720*2 + 256) //(1280*720*4) 
#else
#define __MM_OSD1_LEN           (1008 * 640 * 2  + 256)//(1280*720*2 + 256) //(1280*720*4) 
#endif

#ifdef HD_SUBTITLE_SUPPORT
#define __MM_OSD2_LEN			(720 * 576)//(1280 * 720)
#else
#define __MM_OSD2_LEN			(720 * 576) 
#endif

#define OSD_VSRC_MEM_MAX_SIZE 	0x180000//0x200000	//note.the size is not meaning,vscr is not exist,only for code compatibility. the vscr is the same as display size.


#define __MM_DMX_SI_LEN			(32*188)//(16*188)
#ifdef SUPPORT_MULTI_SD_VIDEO
	#define EXTRA_VIDEO_NUM 3
	#define __MM_DMX_SI_TOTAL_LEN	(__MM_DMX_SI_LEN*(44-EXTRA_VIDEO_NUM))
#else
	#define __MM_DMX_SI_TOTAL_LEN	(__MM_DMX_SI_LEN*44)
#endif

#define __MM_SI_VBV_OFFSET		__MM_DMX_SI_TOTAL_LEN
#define __MM_DMX_DATA_LEN		(0)//(30*188)
#define __MM_DMX_PCR_LEN		(0)//(10*188)
#define __MM_DMX_AUDIO_LEN		(0)//(256*188)//(32*188)
#define __MM_DMX_VIDEO_LEN		(12*512*188)//(8*512*188) //564k=130ms data //752+564=1316
#ifdef SUPPORT_MULTI_SD_VIDEO
	#define __MM_DMX_EXTRA_VIDEO_LEN (960*188)
	#define __MM_DMX_AVP_LEN		(__MM_DMX_VIDEO_LEN+__MM_DMX_EXTRA_VIDEO_LEN*EXTRA_VIDEO_NUM+__MM_DMX_AUDIO_LEN+__MM_DMX_PCR_LEN)
#else
	#define __MM_DMX_AVP_LEN		(__MM_DMX_VIDEO_LEN+__MM_DMX_AUDIO_LEN+__MM_DMX_PCR_LEN)
#endif
#define __MM_DMX_BLK_BUF_LEN    0x5E000	//376K

#ifdef ISDBT_SUPPORT //M3S11
#define __MM_DMX_SEE_BLK_BUF_LEN    0
#else
#define __MM_DMX_SEE_BLK_BUF_LEN    0xbc000
#endif

#if (SUBTITLE_ON == 1)
#define __MM_SUB_BS_LEN			0x12000 //0X2800

#ifdef HD_SUBTITLE_SUPPORT
    #define __MM_SUB_PB_LEN			0x60000//0x50000//0X19000
#else
    #define __MM_SUB_PB_LEN			0x60000
#endif
#else
    #define __MM_SUB_BS_LEN         0x12000 // win_media_player_init -> pe_cfg.music.processed_pcm_buff_size use it
    #define __MM_SUB_PB_LEN         0
#endif

#ifdef SUPPORT_HW_SUBT_DECODE
#define __MM_SUB_HW_DATA_LEN 0xC000
#else
#define __MM_SUB_HW_DATA_LEN 0
#endif

#ifdef ISDBT_CC
#define __MM_ISDBTCC_BS_LEN		0x8FC0	
#define __MM_ISDBTCC_PB_LEN		0x7E900
#endif

// TTX
#if (TTX_ON == 1)

#define __MM_TTX_BS_LEN			0x5000//0X2800
#ifdef TTX_SUB_PAGE
#define __MM_TTX_PB_LEN	            0xCB200 //+80*1040 //0XCA800
#define __MM_TTX_SUB_PAGE_LEN       0x14500 //80*1040
#else
#define __MM_TTX_PB_LEN		        0xCA800 //+80*1040 //
#define __MM_TTX_SUB_PAGE_LEN       0 //80*1040
#endif
#ifdef SUPPORT_PACKET_26
#define __MM_TTX_P26_NATION_LEN     0x61A80 //25*40*400
#define __MM_TTX_P26_DATA_LEN       0x3E8 //25*40
#else
#define __MM_TTX_P26_NATION_LEN     0
#define __MM_TTX_P26_DATA_LEN       0
#endif

#else
#define __MM_TTX_BS_LEN			    0x5000 // win_media_player_init -> pe_cfg.music.pcm_out_buff_size use it
#define __MM_TTX_PB_LEN             0
#define __MM_TTX_SUB_PAGE_LEN       0
#define __MM_TTX_P26_NATION_LEN     0
#define __MM_TTX_P26_DATA_LEN       0
#endif

#ifdef TTX_EPG_SHARE_MEM
#define __MM_EPG_BUFFER_LEN     (__MM_TTX_BS_LEN+__MM_TTX_PB_LEN+__MM_TTX_SUB_PAGE_LEN+__MM_TTX_P26_NATION_LEN+__MM_TTX_P26_DATA_LEN)
#else
#define __MM_EPG_BUFFER_LEN     0x100000//0x96000 // (at least 585K, please reference lib_epg.c)
//#define SCHEDULE_TABLE_ID_NUM 	2 /*(0x50, 0x51 or 0x60, 0x61)*/
#endif

#ifdef DUAL_VIDEO_OUTPUT_USE_VCAP
#define __MM_VCAP_FB_SIZE               (736*576*2*3)
#else
#define __MM_VCAP_FB_SIZE               0
#endif

#ifdef ISDBT_SUPPORT
    #if (SYS_DEM_MODULE == COFDM_S3811)
        #define MP_NIM_SHARE_BUFFER // M3S11 64M Nim buffer share with Mediaplayer
        #define __MM_COFDM_S3811_ISDBT_BUF_LEN  0x750000 // ((7607808+0xF)&0xFFFFFFF0)) //for S3811 ISDBT mode only. (4560*16/2 + 96)*13 -> 7607808 Bytes.
    #else
        #define __MM_COFDM_S3811_ISDBT_BUF_LEN  0
    #endif
#else
    #define __MM_COFDM_S3811_ISDBT_BUF_LEN  0
#endif

#define __MM_NIM_BUFFER_LEN (__MM_COFDM_S3811_ISDBT_BUF_LEN)

#ifdef DVR_PVR_SUPPORT
    //#define __MM_PVR_VOB_BUFFER_LEN	    ((47*1024)*(240*3)+0x1000)
#ifdef _SUPPORT_64M_MEM_MINI    
    #define __MM_PVR_VOB_BUFFER_LEN	    (0x200000)
#else
#ifdef PVR_VOB_BUF_REDUCE
    #define __MM_PVR_VOB_BUFFER_LEN	    (0x400000)
#else
#ifdef ONE_RECODER_PVR
    #define __MM_PVR_VOB_BUFFER_LEN	    (0x500000)
#else
    #define __MM_PVR_VOB_BUFFER_LEN	    (0x700000)
#endif    
#endif    
#endif
#else
    #ifdef _BUILD_OTA_E_
    //ota loader not define DVR_PVR_SUPPORT,But ota loader need use PVR buffer for decompress(6M)
    #define __MM_PVR_VOB_BUFFER_LEN	    (0x600000)
    #else
    #define __MM_PVR_VOB_BUFFER_LEN	    (0x200000)
    #endif
	#define MHEG5_MEMORY_ALLOC_REGION_SIZE 0
#endif
#define __MM_DMX_REC_LEN		    (0)
    
#define __MM_USB_DMA_LEN                0	// 0x10FFFF currently not use
//#define __MM_EPG_BUFFER_LEN             0x100000
#define __MM_AUTOSCAN_DB_BUFFER_LEN     0x100000

#ifdef NETWORK_SUPPORT
#define STO_PROTECT_BY_MUTEX
#define __MM_LWIP_MEM_LEN               0x8000
#define __MM_LWIP_MEMP_LEN              0x5FC00
#define __MM_XML_MEMP_LEN				0x500000 // 5M
#else
#define __MM_LWIP_MEM_LEN               0
#define __MM_LWIP_MEMP_LEN              0
#define __MM_XML_MEMP_LEN				0
#endif

#ifdef MULTIVIEW_SUPPORT
#define __MM_MULTIVEW_BUFFER_LEN    (0x7B0000) //(12*1024*1024+0xC3000)
#else
#define __MM_MULTIVEW_BUFFER_LEN    0
#endif

#define __MM_DBG_MEM_LEN   0 // 0x4000

#ifdef AVC_SUPPORT_UNIFY_MEM
    #if (__MM_FB_START_ADDR < AVC_MEM_ADDR)
    #define __MM_FB_BOTTOM_ADDR         __MM_FB_START_ADDR
    
    #undef  AVC_MEM_ADDR
    #undef  AVC_MEM_LEN
    #define AVC_MEM_ADDR                __MM_FB_BOTTOM_ADDR
    #define AVC_MEM_LEN                 ((AVC_MB_NEI_ADDR - AVC_MEM_ADDR)&0xffffff00)
    
    #else
    #define __MM_FB_BOTTOM_ADDR         AVC_MEM_ADDR
    #endif
#else
    #if (__MM_FB_START_ADDR < AVC_LAF_RW_BUF_ADDR)
    #define __MM_FB_BOTTOM_ADDR         __MM_FB_START_ADDR    
    #else
    #define __MM_FB_BOTTOM_ADDR         AVC_LAF_RW_BUF_ADDR
    #endif        
#endif

#ifdef ISDBT_SUPPORT
/**********************************************************
* NIM
**********************************************************/
#define __MM_COFDM_S3811_ISDBT_ADDR ((__MM_FB_BOTTOM_ADDR - __MM_COFDM_S3811_ISDBT_BUF_LEN)&0XFFFFFFE0)
//other NIM buffer may add here
#define __MM_NIM_BUFFER_ADDR		(__MM_COFDM_S3811_ISDBT_ADDR)
#else
#define __MM_NIM_BUFFER_ADDR		(__MM_FB_BOTTOM_ADDR)
#endif

#ifdef _MHEG5_V20_ENABLE_
#define __MM_MHEG5_BUFFER_ADDR      (__MM_NIM_BUFFER_ADDR - MHEG5_MEMORY_ALLOC_REGION_SIZE)
#define __MM_DMX_AVP_START_ADDR		((__MM_MHEG5_BUFFER_ADDR - __MM_SI_VBV_OFFSET - __MM_DMX_DATA_LEN - __MM_DMX_AVP_LEN)&0XFFFFFFF0)
#else
#define __MM_DMX_AVP_START_ADDR		((__MM_NIM_BUFFER_ADDR - __MM_SI_VBV_OFFSET - __MM_DMX_DATA_LEN - __MM_DMX_AVP_LEN)&0XFFFFFFF0)
#endif

#define __MM_DMX_REC_START_ADDR		((__MM_DMX_AVP_START_ADDR - __MM_DMX_REC_LEN)&0XFFFFFFF0)
#define __MM_DMX_CPU_BLK_ADDR		((__MM_DMX_REC_START_ADDR - __MM_DMX_BLK_BUF_LEN)&0XFFFFFFE0)
//#define __MM_DMX_SEE_BLK_ADDR		((__MM_DMX_CPU_BLK_ADDR - __MM_DMX_BLK_BUF_LEN)&0XFFFFFFE0)
#define __MM_DMX_SEE_BLK_ADDR		((__MM_DMX_CPU_BLK_ADDR - __MM_DMX_SEE_BLK_BUF_LEN)&0XFFFFFFE0)


#ifndef _USE_32M_MEM_
#ifndef ISDBT_SUPPORT
//OTA pressed data & swap share with VE
#define __MM_OTA_PRESSED_BOTTOM_ADDR    __MM_FB_BOTTOM_ADDR
#define __MM_OTA_PRESSED_LEN           0x400000
#define __MM_OTA_PRESSED_TOP_ADDR    (__MM_OTA_PRESSED_BOTTOM_ADDR + __MM_OTA_PRESSED_LEN)

#define __MM_OTA_SWAP_BOTTOM_ADDR   __MM_OTA_PRESSED_TOP_ADDR
#define __MM_OTA_SWAP_LEN           (256*1024)
#define __MM_OTA_SWAP_TOP_ADDR      (__MM_OTA_SWAP_BOTTOM_ADDR + __MM_OTA_SWAP_LEN)

// ota unpressed data buff share with VOB/TTX/EPG
#define __MM_OTA_UNPRESSED_TOP_ADDR     __MM_DMX_SEE_BLK_ADDR
#define __MM_OTA_UNPRESSED_LEN          0x600000
#define __MM_OTA_UNPRESSED_BOTTOM_ADDR  (__MM_OTA_UNPRESSED_TOP_ADDR - __MM_OTA_UNPRESSED_LEN)

#else
//ISDBT VOB+TTX+EPG may less than 6M(Open _SUPPORT_64M_MEM_MINI PVR VOB=2M)
//OTA uncompressed data(6M) buffer should share with VE
//OTA compressed data buffer(4M+256k) should share with VOB/TTX/EPG

//OTA compressed data & swap share with VOB/TTX/EPG
#define __MM_OTA_PRESSED_TOP_ADDR       __MM_DMX_SEE_BLK_ADDR
#define __MM_OTA_PRESSED_LEN           0x400000
#define __MM_OTA_PRESSED_BOTTOM_ADDR    (__MM_OTA_PRESSED_TOP_ADDR - __MM_OTA_PRESSED_LEN)

#define __MM_OTA_SWAP_TOP_ADDR      __MM_OTA_PRESSED_BOTTOM_ADDR
#define __MM_OTA_SWAP_LEN           (256*1024)
#define __MM_OTA_SWAP_BOTTOM_ADDR   (__MM_OTA_SWAP_TOP_ADDR - __MM_OTA_SWAP_LEN)

//OTA uncompressed data buff share with VE
#define __MM_OTA_UNPRESSED_TOP_ADDR     __MM_FB_START_ADDR
#define __MM_OTA_UNPRESSED_LEN          0x600000
#define __MM_OTA_UNPRESSED_BOTTOM_ADDR  (__MM_OTA_UNPRESSED_TOP_ADDR - __MM_OTA_UNPRESSED_LEN)
#endif
#endif


// begin: buffer could be shared by media player
#define __MM_BUF_PVR_TOP_ADDR       __MM_DMX_SEE_BLK_ADDR
#define __MM_PVR_VOB_BUFFER_ADDR	(__MM_BUF_PVR_TOP_ADDR - __MM_PVR_VOB_BUFFER_LEN)

#define __MM_TTX_SUB_PAGE_BUF_ADDR  (__MM_PVR_VOB_BUFFER_ADDR - __MM_TTX_SUB_PAGE_LEN)
#define __MM_TTX_P26_NATION_BUF_ADDR (__MM_TTX_SUB_PAGE_BUF_ADDR - __MM_TTX_P26_NATION_LEN)
#define __MM_TTX_P26_DATA_BUF_ADDR  (__MM_TTX_P26_NATION_BUF_ADDR -  __MM_TTX_P26_DATA_LEN)
#define __MM_TTX_BS_START_ADDR	((__MM_TTX_P26_DATA_BUF_ADDR - __MM_TTX_BS_LEN)&0XFFFFFFFC)
#define __MM_TTX_PB_START_ADDR	((__MM_TTX_BS_START_ADDR - __MM_TTX_PB_LEN)&0XFFFFFFFC)
// modify for TTX and EPG share buffer 2011 10 10
#ifdef TTX_EPG_SHARE_MEM
#define __MM_EPG_BUFFER_START   	(__MM_TTX_PB_START_ADDR)//(__MM_TTX_P26_DATA_BUF_ADDR)
#else
//#define __MM_EPG_BUFFER_START   	(__MM_TTX_P26_DATA_BUF_ADDR - __MM_EPG_BUFFER_LEN)
#define __MM_EPG_BUFFER_START   	(__MM_TTX_PB_START_ADDR-__MM_EPG_BUFFER_LEN)
#endif
//modify end

// end: buffer could be shared by media player

//Subtitle
#define __MM_SUB_BS_START_ADDR	((__MM_EPG_BUFFER_START  - __MM_SUB_BS_LEN)&0XFFFFFFFC)
#define __MM_SUB_HW_DATA_ADDR ((__MM_SUB_BS_START_ADDR - __MM_SUB_HW_DATA_LEN)&0XFFFFFFF0)
#define __MM_SUB_PB_START_ADDR	((__MM_SUB_HW_DATA_ADDR - __MM_SUB_PB_LEN)&0XFFFFFFFC)

//64M memory need share pvr/ttx/epg/subtitle buffer
#define __MM_MULTIVEW_BUFFER_ADDR   ((__MM_DMX_SEE_BLK_ADDR - __MM_MULTIVEW_BUFFER_LEN)&0XFFFFFE00)

#if (__MM_MULTIVEW_BUFFER_ADDR < __MM_SUB_PB_START_ADDR)
#define __MM_GE_START_ADDR			((__MM_MULTIVEW_BUFFER_ADDR - __MM_GE_LEN)&0XFFFFFFE0)//modify memerymap 10 12
#define __MM_OSD_BK_ADDR2           ((__MM_MULTIVEW_BUFFER_ADDR - __MM_OSD2_LEN)&0XFFFFFFF0)
#else
#define __MM_GE_START_ADDR			((__MM_SUB_PB_START_ADDR - __MM_GE_LEN)&0XFFFFFFE0)//modify memerymap 10 12
#define __MM_OSD_BK_ADDR2           ((__MM_SUB_PB_START_ADDR - __MM_OSD2_LEN)&0XFFFFFFF0)
#endif

#define __MM_OSD_BK_ADDR1  			((__MM_OSD_BK_ADDR2 - __MM_OSD1_LEN)&0XFFFFFFF0)
#define __MM_VCAP_FB_ADDR           ((__MM_OSD_BK_ADDR1 - __MM_VCAP_FB_SIZE)&0XFFFFFF00) // 256 bytes alignment

#ifdef OSD_VSRC_SUPPORT
#define __MM_OSD_VSRC_MEM_ADDR		((__MM_VCAP_FB_ADDR - OSD_VSRC_MEM_MAX_SIZE)&0XFFFFFFF0)
#define __MM_ATSC_CC_PB_START_ADDR	((__MM_OSD_VSRC_MEM_ADDR  - __MM_ATSC_CC_PB_LEN)&0XFFFFFFFC)
#else
#define __MM_ATSC_CC_PB_START_ADDR	((__MM_VCAP_FB_ADDR  - __MM_ATSC_CC_PB_LEN)&0XFFFFFFFC)
#endif

#define __MM_ATSC_CC_BS_START_ADDR	((__MM_ATSC_CC_PB_START_ADDR - __MM_ATSC_CC_BS_LEN)&0XFFFFFFFC)


#ifdef ISDBT_SUPPORT
/**********************************************************
* ISDBT CC
**********************************************************/
#ifdef ISDBT_CC
#define __MM_ISDBTCC_BS_START_ADDR ((__MM_ATSC_CC_BS_START_ADDR - __MM_ISDBTCC_BS_LEN)&0XFFFFFFE0)
#define __MM_ISDBTCC_PB_START_ADDR ((__MM_ISDBTCC_BS_START_ADDR - __MM_ISDBTCC_PB_LEN)&0XFFFFFFE0)
#define __MM_LWIP_MEM_ADDR      (__MM_ISDBTCC_PB_START_ADDR - __MM_LWIP_MEM_LEN)
#else
#define __MM_LWIP_MEM_ADDR          (__MM_ATSC_CC_BS_START_ADDR - __MM_LWIP_MEM_LEN)
#endif

#else
#define __MM_LWIP_MEM_ADDR          (__MM_ATSC_CC_BS_START_ADDR - __MM_LWIP_MEM_LEN)
#endif
/*********************************************************
* Wifi, USB, CPU-DBG
**********************************************************/

#define __MM_LWIP_MEMP_ADDR         (__MM_LWIP_MEM_ADDR - __MM_LWIP_MEMP_LEN)
#define __MM_USB_START_ADDR			((__MM_LWIP_MEMP_ADDR - __MM_USB_DMA_LEN)&0XFFFFFFE0)
#define __MM_CPU_DBG_MEM_ADDR      	(__MM_USB_START_ADDR - __MM_DBG_MEM_LEN)
#define __MM_DBG_MEM_ADDR           __MM_CPU_DBG_MEM_ADDR

#define __MM_AUTOSCAN_DB_BUFFER_ADDR    __MM_PVR_VOB_BUFFER_ADDR

//end of main mem map



// for jpeg decoder memmap
#define __MM_FB0_Y_LEN			(1920*1088+1024)//(736*576+512)	//for high definition jpg decode
#define __MM_FB1_Y_LEN			__MM_FB0_Y_LEN
#define __MM_FB2_Y_LEN			__MM_FB0_Y_LEN

#define __MM_FB0_C_LEN			(__MM_FB0_Y_LEN/2)
#define __MM_FB1_C_LEN			__MM_FB0_C_LEN
#define __MM_FB2_C_LEN			__MM_FB0_C_LEN

#define __MM_FB3_Y_LEN			(736*576+1024)
#define __MM_FB3_C_LEN			(__MM_FB3_Y_LEN/2)
#define __MM_FB4_Y_LEN			__MM_FB3_Y_LEN
#define __MM_FB4_C_LEN			__MM_FB3_C_LEN
#define __MM_FB5_Y_LEN          __MM_FB3_Y_LEN
#define __MM_FB5_C_LEN          __MM_FB3_C_LEN
#define __MM_FB6_Y_LEN          __MM_FB3_Y_LEN
#define __MM_FB6_C_LEN          __MM_FB3_C_LEN	

#ifdef IMG_2D_TO_3D
#define __MM_FB0_Y_START_ADDR   (__MM_FB_BOTTOM_ADDR + 0xD00000)
#else
#define __MM_FB0_Y_START_ADDR   (__MM_FB_START_ADDR)
#endif

#define __MM_FB0_C_START_ADDR   (__MM_FB0_Y_START_ADDR+__MM_FB0_Y_LEN)

#define __MM_FB1_Y_START_ADDR   ((__MM_FB0_C_START_ADDR+__MM_FB0_C_LEN)&0XFFFFFE00)
#define __MM_FB1_C_START_ADDR   ((__MM_FB1_Y_START_ADDR+__MM_FB1_Y_LEN)&0XFFFFFE00)

#define __MM_FB2_Y_START_ADDR   ((__MM_FB1_C_START_ADDR+__MM_FB1_C_LEN)&0XFFFFFE00)
#define __MM_FB2_C_START_ADDR   ((__MM_FB2_Y_START_ADDR+__MM_FB2_Y_LEN)&0XFFFFFE00)

#define __MM_FB3_Y_START_ADDR   ((__MM_FB2_C_START_ADDR+__MM_FB2_C_LEN)&0XFFFFFE00)
#define __MM_FB3_C_START_ADDR   ((__MM_FB3_Y_START_ADDR+__MM_FB3_Y_LEN)&0XFFFFFE00)
#define __MM_FB4_Y_START_ADDR	((__MM_FB3_C_START_ADDR+__MM_FB3_C_LEN)&0XFFFFFE00)
#define __MM_FB4_C_START_ADDR   ((__MM_FB4_Y_START_ADDR+__MM_FB4_Y_LEN)&0XFFFFFE00)
#define __MM_FB5_Y_START_ADDR	((__MM_FB4_C_START_ADDR+__MM_FB4_C_LEN)&0XFFFFFE00)
#define __MM_FB5_C_START_ADDR   ((__MM_FB5_Y_START_ADDR+__MM_FB5_Y_LEN)&0XFFFFFE00)
#define __MM_FB6_Y_START_ADDR	((__MM_FB5_C_START_ADDR+__MM_FB5_C_LEN)&0XFFFFFE00)
#define __MM_FB6_C_START_ADDR   ((__MM_FB6_Y_START_ADDR+__MM_FB6_Y_LEN)&0XFFFFFE00)

#ifdef DVR_PVR_SUPPORT
//64M memory need share subtitle/epg buffer
//#define __MM_MP_BUFFER_LEN			__MM_PVR_VOB_BUFFER_LEN
//#define __MM_MP_BUFFER_ADDR			__MM_PVR_VOB_BUFFER_ADDR
#define __MM_MP_BUFFER_ADDR             ((__MM_EPG_BUFFER_START + 0x1FF)&0XFFFFFE00)
#define __MM_MP_BUFFER_LEN              (__MM_FB_BOTTOM_ADDR - __MM_MP_BUFFER_ADDR)
#else
#define __MM_MP_BUFFER_LEN			0x1000000
#define __MM_MP_BUFFER_ADDR			((__MM_FB2_C_START_ADDR - __MM_MP_BUFFER_LEN)&0XFFFFFFF0)
#endif

#define __MM_HEAP_TOP_ADDR      __MM_DBG_MEM_ADDR


#elif (SYS_SDRAM_SIZE == 128)
#ifdef ISDBT_CC
#define ISDBT_CC_DECREASED_SIZE
#endif

#define __MM_VOID_BUFFER_LEN	0x00000000
#define __MM_VBV_LEN			0x12C000//(HD = 8*SD > 4*SD)
#define __MM_MAF_LEN			0x198C00//0xd0000//0X3000//((FLAG==4*4*3K) + VALUE ==120*72*32 *2(Y+C)>46*36*32 *2(Y+C) *4 )
#ifdef VIDEO_DEBLOCKING_SUPPORT
#define __MM_FB_LEN			    0x10CF200//0x19c6200
#else
#define __MM_FB_LEN			    0xdd2200//0XCA8000//0X9B4000//0X26D000//(16*SD>3*HD)
#endif
/********************************************
* SD PVR
*********************************************/
//#define SD_PVR //to support 64M with SD pvr
#define MAX_EXTRA_FB_NUM 3
#ifndef SD_PVR
    #define MAX_MB_WIDTH 120 //(1920/16)
    #define MAX_MB_HEIGHT 68 //(1088/16)
#else
    #define MAX_MB_WIDTH 46//45 //(720/16)
    #define MAX_MB_HEIGHT 36//36 //(576/16)
#endif

#ifdef H264_SUPPORT_MULTI_BANK
    	#ifndef SD_PVR
        #define MAX_MB_STRIDE 120 //120 MB alignment to improve AVC performance
    	#else
        #define MAX_MB_STRIDE 46//46 //120 MB alignment to improve AVC performance
    	#endif
	#define EXTRA_FB_SIZE 0x2000
	#define ONE_FB_SIZE (((MAX_MB_STRIDE*MAX_MB_HEIGHT*256*3/2+EXTRA_FB_SIZE-1)&0xffffe000)+EXTRA_FB_SIZE)
#else
    	#ifndef SD_PVR
        #define MAX_MB_STRIDE 120 //120 MB alignment to improve AVC performance
    	#else
        #define MAX_MB_STRIDE 46//46 //120 MB alignment to improve AVC performance
    	#endif
    
    	#ifdef SD_PVR 
        #define one_frm_y_size 		(MAX_MB_STRIDE*((MAX_MB_HEIGHT+1)/2)*512)
        #define one_frm_c_size   (MAX_MB_STRIDE*((((MAX_MB_HEIGHT+1)/2)+1)/2)*512)   
        #define ONE_FB_SIZE (one_frm_y_size + one_frm_c_size)
    	#else
        #define ONE_FB_SIZE (MAX_MB_STRIDE*MAX_MB_HEIGHT*256*3/2)
    	#endif
#endif

#define ONE_DV_FB_SIZE ((MAX_MB_WIDTH*MAX_MB_HEIGHT*256*3/2)/4)
#define ONE_MV_SIZE 32*(MAX_MB_WIDTH*MAX_MB_HEIGHT) //522240

#ifndef SD_PVR
#define AVC_FB_LEN		ONE_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0x1700000
#define AVC_DVIEW_LEN   ONE_DV_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0xb00000
#define AVC_MV_LEN		ONE_MV_SIZE*(4+MAX_EXTRA_FB_NUM) //0x37c800//0x2FD000
#else
#define const_frm_num   5
#define AVC_FB_LEN		ONE_FB_SIZE*(const_frm_num+MAX_EXTRA_FB_NUM) //0x1700000
#define AVC_DVIEW_LEN   0//  ONE_DV_FB_SIZE*(4+MAX_EXTRA_FB_NUM) //0xb00000
#define AVC_MV_LEN		ONE_MV_SIZE*(const_frm_num+MAX_EXTRA_FB_NUM) //0x37c800//0x2FD000
#endif

#define AVC_MB_COL_LEN		0x15000//0x11000
#define AVC_MB_NEI_LEN		0xf000
#define AVC_CMD_QUEUE_LEN   0x10000 //In allegro test stream, this length could be bigger than 128k, however, in realistic, 0x10000 should be enough
#undef  AVC_LAF_RW_BUF_LEN
//#define AVC_LAF_RW_BUF_LEN ((MAX_MB_WIDTH*MAX_MB_HEIGHT)*32*2*2)
#define AVC_LAF_RW_BUF_LEN (((((MAX_MB_WIDTH*MAX_MB_HEIGHT)*48*2)+1023)&0x0ffffc00)*2)

//#define AVC_LAF_FLAG_BUF_LEN (0xc00*21)
#define AVC_LAF_FLAG_BUF_LEN (0xc00*22) //when enable dual output, we need 1 more laf buffer

#ifdef AVC_VBV_LEN
#undef AVC_VBV_LEN
#endif

#ifndef SD_PVR
    #define AVC_VBV_LEN		0x400000 //for CI+, must use 4MB. if this size is set to 0x200000, vbv buffer overflow could happen in 20061007d_0.ts
#else
    #define AVC_VBV_LEN		0x180000 
#endif

/*************************************************
* OSD lib
**************************************************/
#if 1 //ifdef FPGA_TEST
#define __MM_GMA1_LEN			0 // 0x1FA400 // 1920*1080 osd layer1  		
#define __MM_GMA2_LEN			0 // 0x1FA400//1920*1080  osd layer2
#define __MM_TEMP_BUF_LEN		0 // 0x100 //1920*1080*4 temp resize buffer
#define __MM_CMD_LEN			0 // 0x6DB0 // command buffer
#else
#define __MM_GMA1_LEN			0x1FA400 // 1920*1080 osd layer1  		
#define __MM_GMA2_LEN			0x1FA400//1920*1080  osd layer2
#define __MM_TEMP_BUF_LEN		0x100 //1920*1080*4 temp resize buffer
#define __MM_CMD_LEN			0x6DB0 // command buffer
#endif
#define __MM_GE_LEN			    (__MM_GMA1_LEN+__MM_GMA2_LEN+__MM_TEMP_BUF_LEN+__MM_CMD_LEN) //0xBE45B0
#define __MM_OSD_LEN			0x65400 // 720*576
#ifdef _INVW_JUICE   
#define __MM_OSD1_LEN           (1280*720*4) 
#else
#ifdef MULTIVIEW_SUPPORT
#define __MM_OSD1_LEN           (1280*720*2 + 256) //(1280*720*4) 
#else
#define __MM_OSD1_LEN           (1008 * 640 * 2  + 256)//(1280*720*2 + 256) //(1280*720*4) 
#endif
#endif

#ifdef HD_SUBTITLE_SUPPORT
#define __MM_OSD2_LEN			(720 * 576)//(1920 * 1080)
#else
#define __MM_OSD2_LEN			(720 * 576) 
#endif

#define OSD_VSRC_MEM_MAX_SIZE 	0x180000	//note.the size is not meaning,vscr is not exist,only for code compatibility. the vscr is the same as display size.

/*************************************************
* DMX, Subtitle, TTX
**************************************************/
#define __MM_DMX_SI_LEN			(32*188)//(16*188)
#ifdef SUPPORT_MULTI_SD_VIDEO
	#define EXTRA_VIDEO_NUM 3
	#define __MM_DMX_SI_TOTAL_LEN	(__MM_DMX_SI_LEN*(44-EXTRA_VIDEO_NUM))
#else
	#define __MM_DMX_SI_TOTAL_LEN	(__MM_DMX_SI_LEN*44)
#endif

#define __MM_SI_VBV_OFFSET		__MM_DMX_SI_TOTAL_LEN
#define __MM_DMX_DATA_LEN		(30*188)
#define __MM_DMX_PCR_LEN		(10*188)
#define __MM_DMX_AUDIO_LEN		(256*188)//(32*188)
#define __MM_DMX_VIDEO_LEN		(12*512*188)//(8*512*188)
#ifdef SUPPORT_MULTI_SD_VIDEO
	#define __MM_DMX_EXTRA_VIDEO_LEN (960*188)
	#define __MM_DMX_AVP_LEN		(__MM_DMX_VIDEO_LEN+__MM_DMX_EXTRA_VIDEO_LEN*EXTRA_VIDEO_NUM+__MM_DMX_AUDIO_LEN+__MM_DMX_PCR_LEN)
#else
	#define __MM_DMX_AVP_LEN		(__MM_DMX_VIDEO_LEN+__MM_DMX_AUDIO_LEN+__MM_DMX_PCR_LEN)
#endif
#define __MM_DMX_BLK_BUF_LEN    0xbc000

#define __MM_SUB_BS_LEN			0x12000 //0X2800

#ifdef HD_SUBTITLE_SUPPORT
    #define __MM_SUB_PB_LEN			0xA0000//0x50000//0X19000
#else
    #define __MM_SUB_PB_LEN			0X19000
#endif

#ifdef SUPPORT_HW_SUBT_DECODE
#define __MM_SUB_HW_DATA_LEN 0xC000
#else
#define __MM_SUB_HW_DATA_LEN 0
#endif

#ifdef ISDBT_CC
#define __MM_ISDBTCC_BS_LEN		0x8FC0	
#define __MM_ISDBTCC_PB_LEN		0x7E900
#endif

#if (CC_ON==1)
#define OSD_CC_WIDTH   	  576//480//480//704//480//(CC_CHAR_W*40+16)//560//704(16bytes aligned)
#define OSD_CC_HEIGHT  	  390//360//300//360//300//450//(CC_CHAR_H*15)//500//570
#define CC_CHAR_HEIGHT		26

#define __MM_ATSC_CC_PB_RECT_LEN (OSD_CC_WIDTH*OSD_CC_HEIGHT)
#define __MM_ATSC_CC_PB_LEN  (__MM_ATSC_CC_PB_RECT_LEN+OSD_CC_WIDTH*4*CC_CHAR_HEIGHT)
#define __MM_ATSC_CC_BS_LEN  0x2c00 // 1K Word CC Data, 1K Byte CC Field, 2K Word DTVCC Data
//#define __MM_SUBT_ATSC_SEC_LEN	0x400	// 1KB  

#else
#undef __MM_ATSC_CC_PB_LEN
#undef __MM_ATSC_CC_BS_LEN
#define __MM_ATSC_CC_PB_LEN	0
#define __MM_ATSC_CC_BS_LEN	0
#endif
// TTX
#define __MM_TTX_BS_LEN			0x5000//0X2800
#ifdef TTX_SUB_PAGE
#define __MM_TTX_PB_LEN	            0xCB200 //+80*1040 //0XCA800
#define __MM_TTX_SUB_PAGE_LEN       0x14500 //80*1040
#else
#define __MM_TTX_PB_LEN		        0xCA800 //+80*1040 //
#define __MM_TTX_SUB_PAGE_LEN       0 //80*1040
#endif
#ifdef SUPPORT_PACKET_26
#define __MM_TTX_P26_NATION_LEN     0x61A80 //25*40*400
#define __MM_TTX_P26_DATA_LEN       0x3E8 //25*40
#else
#define __MM_TTX_P26_NATION_LEN     0
#define __MM_TTX_P26_DATA_LEN       0
#endif

/*************************************************
* Demod, Tuner
**************************************************/
#define SYS_DEM_MODULE          COFDM_S3811

#if defined (_BOARD_DB_M3811_02V02_)
    #define SYS_TUN_MODULE		MXL603
#elif defined(_BOARD_DB_M3812_03V01_)
    #define SYS_TUN_MODULE		CXD2861//MXL603
//Martin@20150324_Support_MXL603
#elif defined (_BOARD_DB_M3811_01V01_)
	#if(AOV_TUN_MODULE == TUNER_MXL603)
    	#define SYS_TUN_MODULE          MXL603 
	#elif(AOV_TUN_MODULE == TUNER_MXL5007)
    	#define SYS_TUN_MODULE          MXL5007 
	#endif
//----End Martin
#else
    #define SYS_TUN_MODULE      ANY_TUNER //MXL136 MXL603 MXL5007 IX2410 NM120 RT820T
#endif

#ifdef ISDBT_SUPPORT
    #if (SYS_DEM_MODULE == COFDM_S3811)
        #define __MM_COFDM_S3811_ISDBT_BUF_LEN  0x750000 // ((7607808+0xF)&0xFFFFFFF0)) //for S3811 ISDBT mode only. (4560*16/2 + 96)*13 -> 7607808 Bytes.
    #else
        #define __MM_COFDM_S3811_ISDBT_BUF_LEN  0
    #endif
#else
    #define __MM_COFDM_S3811_ISDBT_BUF_LEN  0
#endif

/*************************************************
* DVR PVR
**************************************************/
#ifdef DVR_PVR_SUPPORT
  #ifdef _MHEG5_V20_ENABLE_ //MHEG5 enable, reserve 8MB
	#define __MM_PVR_VOB_BUFFER_LEN	    ((47*1024)*(180*3)+0x1000)
    #define MHEG5_MEMORY_ALLOC_REGION_SIZE	    0X800000
  #else
#ifdef _INVW_JUICE   
    #define __MM_PVR_VOB_BUFFER_LEN_ORIG	    ((47*1024)*(240*3)+0x1000 - __MM_COFDM_S3811_ISDBT_BUF_LEN)
    #define __MM_PVR_VOB_BUFFER_LEN	    ((20*1024)*(240*3)+0x1000 - __MM_COFDM_S3811_ISDBT_BUF_LEN)
    #define __MM_PVR_VOB_BUFFER_LEN2	    ((27*1024)*(240*3)+0x1000 )
#else
    #define __MM_PVR_VOB_BUFFER_LEN	    ((47*1024)*(240*3)+0x1000 - __MM_COFDM_S3811_ISDBT_BUF_LEN)
    //#define __MM_PVR_VOB_BUFFER_LEN	    ((47*1024)*(90*2)+0x1000)
#endif
  #endif
#else
    #define __MM_PVR_VOB_BUFFER_LEN	    ((47*1024)*(80+75 * 2)+0x1000)
	#define MHEG5_MEMORY_ALLOC_REGION_SIZE 0
#endif
    #define __MM_DMX_REC_LEN		    (__MM_DMX_AVP_LEN)
    
#define __MM_USB_DMA_LEN                0	// 0x10FFFF currently not use
#define __MM_EPG_BUFFER_LEN             0x100000

/************************************************
* Autoscan
*************************************************/
#define __MM_AUTOSCAN_DB_BUFFER_LEN     0x100000

/*************************************************
* Network
**************************************************/
#ifdef NETWORK_SUPPORT
#define STO_PROTECT_BY_MUTEX
#define __MM_LWIP_MEM_LEN               0x8000
#define __MM_LWIP_MEMP_LEN              0x5FC00
#define __MM_XML_MEMP_LEN				0x500000 // 5M
#else
#define __MM_LWIP_MEM_LEN               0
#define __MM_LWIP_MEMP_LEN              0
#define __MM_XML_MEMP_LEN				0
#endif

#ifdef DUAL_VIDEO_OUTPUT_USE_VCAP
#define __MM_VCAP_FB_SIZE               (736*576*2*5)
#else
#define __MM_VCAP_FB_SIZE               0
#endif

/*************************************************
* Debug 
**************************************************/
#define __MM_DBG_MEM_LEN   0x4000

/*^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
^ Memory space addr define
^
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^*/

/*************************************************
* Define Top
**************************************************/
#define __MM_HIGHEST_ADDR  			0xa8000000		//128
#define __MM_VOID_BUFFER_ADDR		(__MM_HIGHEST_ADDR - __MM_VOID_BUFFER_LEN)	
#define __MM_FB_TOP_ADDR			__MM_VOID_BUFFER_ADDR	//64MB

/*************************************************
* VDEC Addr
**************************************************/
#define __MM_VBV_START_ADDR		((__MM_FB_TOP_ADDR - __MM_VBV_LEN)&0XFFFFFF00)
#define __MM_MAF_START_ADDR		((__MM_VBV_START_ADDR - __MM_MAF_LEN)&0XFFFFFC00)
#define __MM_FB_START_ADDR			((__MM_MAF_START_ADDR - __MM_FB_LEN)&0XFFFFFF00)
// for satcodx memmap
#define __MM_DVW_START_ADDR			((__MM_FB_START_ADDR)&0XFFFFFFF0)

/**************************************************
* AVC Addr
**************************************************/
//#define AVC_SUPPORT_UNIFY_MEM
#ifndef AVC_SUPPORT_UNIFY_MEM
/*AVC buffer allocation*/
#define AVC_VBV_ADDR 		(__MM_FB_TOP_ADDR - AVC_VBV_LEN) 	//256 bytes alignment
#define AVC_FB_ADDR 		((AVC_VBV_ADDR -  AVC_FB_LEN )&0xfffffe00)   		//512 bytes alignment
#define AVC_DVIEW_ADDR 		((AVC_FB_ADDR -  AVC_DVIEW_LEN)&0xfffffe00) 	//512 bytes alignment
#define AVC_CMD_QUEUE_ADDR  		((AVC_DVIEW_ADDR - AVC_CMD_QUEUE_LEN)&0xffffff00)  	//256 bytes alignment
#define AVC_MV_ADDR 		((AVC_CMD_QUEUE_ADDR - AVC_MV_LEN)&0xffffff00)  		//256 bytes alignment
#define AVC_MB_COL_ADDR 	((AVC_MV_ADDR - AVC_MB_COL_LEN)&0xffffff00) 		//256 bytes alignment
#define AVC_MB_NEI_ADDR 	((AVC_MB_COL_ADDR - AVC_MB_NEI_LEN)&0xffffff00) 	//256 bytes alignment
#define AVC_LAF_FLAG_BUF_ADDR 		((AVC_MB_NEI_ADDR - AVC_LAF_FLAG_BUF_LEN)&0xfffffc00)  //1024 bytes alignment
#define AVC_LAF_RW_BUF_ADDR   ((AVC_LAF_FLAG_BUF_ADDR - AVC_LAF_RW_BUF_LEN)&0xfffffc00)  //1024 bytes alignment
#else

#define AVC_VBV_ADDR 				((__MM_FB_TOP_ADDR - AVC_VBV_LEN )&0xffffff00) 	//256 bytes alignment
#define AVC_CMD_QUEUE_ADDR  		((AVC_VBV_ADDR - AVC_CMD_QUEUE_LEN)&0xffffff00)  	//256 bytes alignment
#define AVC_MB_COL_ADDR 			((AVC_CMD_QUEUE_ADDR - AVC_MB_COL_LEN)&0xffffff00) 		//256 bytes alignment
#define AVC_MB_NEI_ADDR 			((AVC_MB_COL_ADDR - AVC_MB_NEI_LEN)&0xffffff00) 	//256 bytes alignment
#define AVC_MEM_ADDR 				((AVC_MB_NEI_ADDR - AVC_MEM_LEN)&0xffffff00)

#define AVC_DVIEW_ADDR 				0
#define AVC_MV_ADDR 				0
#define AVC_LAF_RW_BUF_ADDR   		0
#define AVC_LAF_FLAG_BUF_ADDR 		0
#define AVC_FB_ADDR					0
#endif

/***************************************************
* Align to lower
****************************************************/
#ifdef AVC_SUPPORT_UNIFY_MEM
    #if (__MM_FB_START_ADDR < AVC_MEM_ADDR)
    #define __MM_FB_BOTTOM_ADDR         __MM_FB_START_ADDR
    
    #undef  AVC_MEM_ADDR
    #undef  AVC_MEM_LEN
    #define AVC_MEM_ADDR                __MM_FB_BOTTOM_ADDR
    #define AVC_MEM_LEN                 ((AVC_MB_NEI_ADDR - AVC_MEM_ADDR)&0xffffff00)
    
    #else
    #define __MM_FB_BOTTOM_ADDR         AVC_MEM_ADDR
    #endif
#else
    #if (__MM_FB_START_ADDR < AVC_LAF_RW_BUF_ADDR)
    #define __MM_FB_BOTTOM_ADDR         __MM_FB_START_ADDR    
    #else
    #define __MM_FB_BOTTOM_ADDR         AVC_LAF_RW_BUF_ADDR
    #endif        
#endif

#ifndef AVC_SUPPORT_UNIFY_MEM
#define AVC_MEM_LEN 0   //for compile error
#endif

/***************************************************
* PVR addr
* error: Lenth < Autoscan Length
****************************************************/
// begin: buffer could shared by media player
#define __MM_BUF_PVR_TOP_ADDR       __MM_FB_BOTTOM_ADDR
#ifdef _INVW_JUICE   
#define __MM_PVR_VOB_BUFFER_ADDR2	(__MM_BUF_PVR_TOP_ADDR - __MM_PVR_VOB_BUFFER_LEN2)
#define __MM_PVR_VOB_BUFFER_ADDR	(__MM_PVR_VOB_BUFFER_ADDR2 - __MM_PVR_VOB_BUFFER_LEN)
#else
#define __MM_PVR_VOB_BUFFER_ADDR	(__MM_BUF_PVR_TOP_ADDR - __MM_PVR_VOB_BUFFER_LEN)
#endif
/***************************************************
* Autoscan (Share to PVR)
* error: Lenth > PVR-length 
****************************************************/
#define __MM_AUTOSCAN_DB_BUFFER_ADDR    __MM_PVR_VOB_BUFFER_ADDR

/***************************************************
* DMX addr
****************************************************/
#define __MM_DMX_AVP_START_ADDR		((__MM_PVR_VOB_BUFFER_ADDR - __MM_SI_VBV_OFFSET - __MM_DMX_DATA_LEN - __MM_DMX_AVP_LEN)&0XFFFFFFF0)

#define __MM_DMX_REC_START_ADDR		((__MM_DMX_AVP_START_ADDR - __MM_DMX_REC_LEN)&0XFFFFFFF0)

#define __MM_DMX_CPU_BLK_ADDR		((__MM_DMX_REC_START_ADDR - __MM_DMX_BLK_BUF_LEN)&0XFFFFFFE0)
#define __MM_DMX_SEE_BLK_ADDR		((__MM_DMX_CPU_BLK_ADDR - __MM_DMX_BLK_BUF_LEN)&0XFFFFFFE0)
#define __MM_TTX_SUB_PAGE_BUF_ADDR  (__MM_DMX_SEE_BLK_ADDR - __MM_TTX_SUB_PAGE_LEN)
#define __MM_TTX_P26_NATION_BUF_ADDR (__MM_TTX_SUB_PAGE_BUF_ADDR - __MM_TTX_P26_NATION_LEN)
#define __MM_TTX_P26_DATA_BUF_ADDR  (__MM_TTX_P26_NATION_BUF_ADDR -  __MM_TTX_P26_DATA_LEN)
#define __MM_TTX_BS_START_ADDR	((__MM_TTX_P26_DATA_BUF_ADDR - __MM_TTX_BS_LEN)&0XFFFFFFFC)
#define __MM_TTX_PB_START_ADDR	((__MM_TTX_BS_START_ADDR - __MM_TTX_PB_LEN)&0XFFFFFFFC)
#define __MM_ATSC_CC_PB_START_ADDR	((__MM_TTX_PB_START_ADDR - __MM_ATSC_CC_PB_LEN)&0XFFFFFFFC)
#define __MM_ATSC_CC_BS_START_ADDR	((__MM_ATSC_CC_PB_START_ADDR - __MM_ATSC_CC_BS_LEN)&0XFFFFFFFC)
#define __MM_EPG_BUFFER_START   	(__MM_ATSC_CC_BS_START_ADDR-__MM_EPG_BUFFER_LEN)
// end: buffer could shared by media player

/***********************************************************
* GE,  SUBTITLE
***********************************************************/
#define __MM_GE_START_ADDR			((__MM_EPG_BUFFER_START - __MM_GE_LEN)&0XFFFFFFE0)
#define __MM_OSD_BK_ADDR2       ((__MM_GE_START_ADDR - __MM_OSD2_LEN)&0XFFFFFFF0)
#define __MM_OSD_BK_ADDR1  			((__MM_OSD_BK_ADDR2 - __MM_OSD1_LEN)&0XFFFFFFF0)
#define __MM_VCAP_FB_ADDR           ((__MM_OSD_BK_ADDR1 - __MM_VCAP_FB_SIZE)&0XFFFFFF00) // 256 bytes alignment
#define __MM_OSD_VSRC_MEM_ADDR		((__MM_VCAP_FB_ADDR - OSD_VSRC_MEM_MAX_SIZE)&0XFFFFFFF0)

#define __MM_SUB_BS_START_ADDR	((__MM_OSD_VSRC_MEM_ADDR  - __MM_SUB_BS_LEN)&0XFFFFFFFC)
#define __MM_SUB_HW_DATA_ADDR ((__MM_SUB_BS_START_ADDR - __MM_SUB_HW_DATA_LEN)&0XFFFFFFF0)
#define __MM_SUB_PB_START_ADDR	((__MM_SUB_HW_DATA_ADDR - __MM_SUB_PB_LEN)&0XFFFFFFFC)

/**********************************************************
* NIM
**********************************************************/
#define __MM_COFDM_S3811_ISDBT_ADDR ((__MM_SUB_PB_START_ADDR - __MM_COFDM_S3811_ISDBT_BUF_LEN)&0XFFFFFFE0)

/**********************************************************
* ISDBT CC
**********************************************************/
#ifdef ISDBT_CC
#define __MM_ISDBTCC_BS_START_ADDR ((__MM_COFDM_S3811_ISDBT_ADDR - __MM_ISDBTCC_BS_LEN)&0XFFFFFFE0)
#define __MM_ISDBTCC_PB_START_ADDR ((__MM_ISDBTCC_BS_START_ADDR - __MM_ISDBTCC_PB_LEN)&0XFFFFFFE0)
#define __MM_LWIP_MEM_ADDR      (__MM_ISDBTCC_PB_START_ADDR - __MM_LWIP_MEM_LEN)
#else
	#define __MM_LWIP_MEM_ADDR          (__MM_COFDM_S3811_ISDBT_ADDR - __MM_LWIP_MEM_LEN)
#endif
/*********************************************************
* Wifi, USB, CPU-DBG
**********************************************************/
#define __MM_LWIP_MEMP_ADDR         (__MM_LWIP_MEM_ADDR - __MM_LWIP_MEMP_LEN)
#define __MM_USB_START_ADDR			((__MM_LWIP_MEMP_ADDR - __MM_USB_DMA_LEN)&0XFFFFFFE0)
#define __MM_CPU_DBG_MEM_ADDR      	(__MM_USB_START_ADDR - __MM_DBG_MEM_LEN)
#define __MM_DBG_MEM_ADDR           __MM_CPU_DBG_MEM_ADDR

/*********************************************************
* Media player( Share to DMX,PVR)
*********************************************************/
#ifdef DVR_PVR_SUPPORT
//media player need share other buffers
//#define __MM_MP_BUFFER_LEN			__MM_PVR_VOB_BUFFER_LEN
//#define __MM_MP_BUFFER_ADDR			__MM_PVR_VOB_BUFFER_ADDR
#ifdef _INVW_JUICE   
#define __MM_MP_BUFFER_LEN			__MM_PVR_VOB_BUFFER_LEN
#define __MM_MP_BUFFER_ADDR			__MM_PVR_VOB_BUFFER_ADDR
#else
#define __MM_MP_BUFFER_ADDR             ((__MM_EPG_BUFFER_START + 0x1FF)&0XFFFFFE00)
#define __MM_MP_BUFFER_LEN              (__MM_FB_BOTTOM_ADDR - __MM_MP_BUFFER_ADDR)
#endif
#else
#define __MM_MP_BUFFER_LEN			0x1000000
#define __MM_MP_BUFFER_ADDR			((__MM_FB2_C_START_ADDR - __MM_MP_BUFFER_LEN)&0XFFFFFFF0)
#endif
//end of main mem map

/********************************************************
* FB detail addr
*********************************************************/
// for jpeg decoder memmap
#define __MM_FB0_Y_LEN			(1920*1088+1024)//(736*576+512)	//for high definition jpg decode
#define __MM_FB1_Y_LEN			__MM_FB0_Y_LEN
#define __MM_FB2_Y_LEN			__MM_FB0_Y_LEN

#define __MM_FB0_C_LEN			(__MM_FB0_Y_LEN/2)
#define __MM_FB1_C_LEN			__MM_FB0_C_LEN
#define __MM_FB2_C_LEN			__MM_FB0_C_LEN

#define __MM_FB3_Y_LEN			(736*576+1024)
#define __MM_FB3_C_LEN			(__MM_FB3_Y_LEN/2)
#define __MM_FB4_Y_LEN			__MM_FB3_Y_LEN
#define __MM_FB4_C_LEN			__MM_FB3_C_LEN
#define __MM_FB5_Y_LEN          __MM_FB3_Y_LEN
#define __MM_FB5_C_LEN          __MM_FB3_C_LEN
#define __MM_FB6_Y_LEN          __MM_FB3_Y_LEN
#define __MM_FB6_C_LEN          __MM_FB3_C_LEN	

#define __MM_FB0_Y_START_ADDR   (__MM_FB_START_ADDR)
#define __MM_FB0_C_START_ADDR   (__MM_FB0_Y_START_ADDR+__MM_FB0_Y_LEN)

#define __MM_FB1_Y_START_ADDR   ((__MM_FB0_C_START_ADDR+__MM_FB0_C_LEN)&0XFFFFFE00)
#define __MM_FB1_C_START_ADDR   ((__MM_FB1_Y_START_ADDR+__MM_FB1_Y_LEN)&0XFFFFFE00)

#define __MM_FB2_Y_START_ADDR   ((__MM_FB1_C_START_ADDR+__MM_FB1_C_LEN)&0XFFFFFE00)
#define __MM_FB2_C_START_ADDR   ((__MM_FB2_Y_START_ADDR+__MM_FB2_Y_LEN)&0XFFFFFE00)

#define __MM_FB3_Y_START_ADDR   ((__MM_FB2_C_START_ADDR+__MM_FB2_C_LEN)&0XFFFFFE00)
#define __MM_FB3_C_START_ADDR   ((__MM_FB3_Y_START_ADDR+__MM_FB3_Y_LEN)&0XFFFFFE00)
#define __MM_FB4_Y_START_ADDR	((__MM_FB3_C_START_ADDR+__MM_FB3_C_LEN)&0XFFFFFE00)
#define __MM_FB4_C_START_ADDR   ((__MM_FB4_Y_START_ADDR+__MM_FB4_Y_LEN)&0XFFFFFE00)
#define __MM_FB5_Y_START_ADDR	((__MM_FB4_C_START_ADDR+__MM_FB4_C_LEN)&0XFFFFFE00)
#define __MM_FB5_C_START_ADDR   ((__MM_FB5_Y_START_ADDR+__MM_FB5_Y_LEN)&0XFFFFFE00)
#define __MM_FB6_Y_START_ADDR	((__MM_FB5_C_START_ADDR+__MM_FB5_C_LEN)&0XFFFFFE00)
#define __MM_FB6_C_START_ADDR   ((__MM_FB6_Y_START_ADDR+__MM_FB6_Y_LEN)&0XFFFFFE00)

#define __MM_HEAP_TOP_ADDR      __MM_DBG_MEM_ADDR


#endif //end of 128M config

#ifdef HW_SECURE_ENABLE
#define __MM_VIDEO_FILE_BUF_ADDR    __MM_SEE_MP_BUF_ADDR
#define __MM_VIDEO_FILE_BUF_LEN     (__MM_PRIVATE_TOP_ADDR - __MM_SEE_MP_BUF_ADDR)
#else
#define __MM_VIDEO_FILE_BUF_ADDR    __MM_MP_BUFFER_ADDR
#define __MM_VIDEO_FILE_BUF_LEN     __MM_MP_BUFFER_LEN
#endif

#if (256 == COLOR_N)	
#define	BIT_PER_PIXEL		8
#define 	OSD_TRANSPARENT_COLOR		0xFF
#define 	OSD_TRANSPARENT_COLOR_BYTE 	0xFF
#define	IF_GLOBAL_ALPHA	FALSE
#elif (16 == COLOR_N)	
#define	BIT_PER_PIXEL		4
#define 	OSD_TRANSPARENT_COLOR		15
#define 	OSD_TRANSPARENT_COLOR_BYTE 	0xFF
#define	IF_GLOBAL_ALPHA	FALSE
#elif(4 == COLOR_N)	
#define	BIT_PER_PIXEL		2
#define 	OSD_TRANSPARENT_COLOR		3
#define 	OSD_TRANSPARENT_COLOR_BYTE 0xFF
#define	IF_GLOBAL_ALPHA	TRUE
#endif

#if(BIT_PER_PIXEL	== 2)
#define	FACTOR					2					
#elif	(BIT_PER_PIXEL    == 4)
#define	FACTOR					1					
#elif	(BIT_PER_PIXEL     == 8)
#define	FACTOR					0					
#endif


/***********************************************************************
 AP feature support  maro define
*************************************************************************/
#define	 LOGO_ID_TYPE 0x02FD0000
#define	 LOGO_ID			(LOGO_ID_TYPE | 0x0100)
#define	 MENU_LOGO_ID	(LOGO_ID_TYPE | 0x0100)
#define	 RADIO_LOGO_ID	(LOGO_ID_TYPE | 0x0100)
#define	 MEDIA_LOGO_ID	(LOGO_ID_TYPE | 0x0100)
#define	 BOOT_LOGO_ID	(LOGO_ID_TYPE | 0x0100)
#define	 MAINCODE_ID		0x01FE0101
#define KEY_STORE_ID		0x21DE0100
#define OTA_LOADER_ID   0x00FF0100
#define SEECODE_ID       0x06F90101
#define DECRYPT_KEY_ID  0x22DD0100
#define HDCPKEY_CHUNK_ID (HDCPKEY_CHUNID_TYPE |0x0100)
#define STBINFO_ID       0x20DF0100
#define	 CADATA_ID		0x05FA0100
#define	 DEFAULT_DB_ID	0x03FC0100
#define USER_DB_ID       0x04FB0100
#define CIPLUSKEY_CHUNK_ID 0x09F60101


#define BINCODE_COMPRESSED
#define OTA_STATIC_SWAP_MEM
//----------------------------------------------------------

#define VIDEO_SUPPORT_EXTRA_DVIEW_WINDOW
#define VDEC27_SUPPORT_COLORBAR
//#define VIDEO_OVERSHOOT_SOLUTION
#define VIDEO_SYNC_ISSUE



#define ANTENNA_INSTALL_BEEP	2

/* If define ANTENNA_INSTALL_BEEP ==1,
	then DVBT_BEE_TONE have effect,
   else if (ANTENNA_INSTALL_BEEP == 2)
   	then AUDIO_SPECIAL_EFFECT have effect */
#define AUDIO_SPECIAL_EFFECT	/* play mpeg audio file*/
#define ASE_EXT
#define DVBT_BEE_TONE	/* continues beep*/
//#define ALI_SDK_API_ENABLE


#define CODEC_I2S (0x0<<1)
#define CODEC_LEFT (0x1<<1)
#define CODEC_RIGHT (0x2<<1)


#define EASY_DM_SWITCH
#define PSI_MONITOR_PAT_SUPPORT

#define KEYBOARD_SUPPORT

/* If "RAM_TMS_TEST" is defined, MUST re-define "RAM_DISK_ADDR" and "RAM_DISK_SIZE".
 *	1. RAM_DISK_ADDR: MUST NOT share with other module.
 *	2. RAM_DISK_SIZE: MUST (>= 14MByte) for SD and (>= 32MByte) for HD.
 */
#ifdef RAM_TMS_TEST
	#define RAM_DISK_ADDR	__MM_PVR_VOB_BUFFER_ADDR
	#define RAM_DISK_SIZE	((__MM_PVR_VOB_BUFFER_LEN / (47*1024) / 3) * (47*1024))
#endif


/***********************************************************
AP and UI  use GPIO configure
************************************************************/
#define EXTERNAL_PULL_HIGH		TRUE    // for I2C_gpio.c

// comon function
#define SYS_12V_SWITCH		SYS_FUNC_OFF


#if (SYS_MAIN_BOARD == BOARD_DB_M3606_01V01)
#ifndef USB_MP_SUPPORT
#undef  MULTI_VOLUME_SUPPORT
#endif

#endif
//modify for adding welcome page when only open dvbt 2011 10 17
#ifdef RECORD_SUPPORT
#define PVR_AUTO_STANDBY_SUPPORT
#endif
//modify end

#undef  SYS_GPIO_MODULE
#define SYS_GPIO_MODULE M3602F_GPIO

#ifdef DVBS_SUPPORT 
#define SYS_LNB_POWER_OFF   SYS_FUNC_ON
#else
#define SYS_LNB_POWER_OFF   SYS_FUNC_OFF
#endif

//add for set DacType
#define VDAC_USE_CVBS_TYPE      CVBS_1
#define VDAC_USE_RGB_TYPE       RGB_1
#define VDAC_USE_YUV_TYPE       YUV_1

#define CVBS_DAC                DAC3

//#define SVIDEO_DAC_Y            DAC1
//#define SVIDEO_DAC_C            DAC0

//3805
#if ( defined (_BOARD_DB_M3805_01V01_)) || ( defined(_BOARD_SB_M3805_01V01_))
#define RGB_DAC_G               DAC0
#define RGB_DAC_B               DAC1
#define RGB_DAC_R               DAC2

#define YUV_DAC_Y               DAC0
#define YUV_DAC_U               DAC1
#define YUV_DAC_V               DAC2

#elif defined (_BOARD_DB_M3811_02V02_)
#define RGB_DAC_R               DAC0
#define RGB_DAC_B               DAC1
#define RGB_DAC_G               DAC2

#define YUV_DAC_V               DAC0
#define YUV_DAC_U               DAC1
#define YUV_DAC_Y               DAC2

#elif defined(_BOARD_DB_M3812_03V01_)
#define RGB_DAC_R               DAC0
#define RGB_DAC_B               DAC1
#define RGB_DAC_G               DAC2

#define YUV_DAC_V               DAC0
#define YUV_DAC_U               DAC1
#define YUV_DAC_Y               DAC2

//3811
#else 
#define RGB_DAC_R               DAC0
#define RGB_DAC_G               DAC1
#define RGB_DAC_B               DAC2

#define YUV_DAC_V               DAC0
#define YUV_DAC_Y               DAC1
#define YUV_DAC_U               DAC2
#endif


#ifdef _BUILD_OTA_E_
	#undef CI_SLOT_DYNAMIC_DETECT
	#define DMX_XFER_V_ES_BY_DMA 	//added for s3601. transfer video ES by DMA, others by CPU copy	
	#undef CI_SUPPORT
	#undef CC_USE_TSG_PLAYER
	#undef MULTI_VOLUME_SUPPORT
	#undef DYNAMIC_PID_SUPPORT
	#undef NETWORK_SUPPORT
	#undef SUPPORT_DEO_HINT
	#undef AUTOMATIC_STANDBY
	#undef MP_SUBTITLE_SUPPORT
	#undef SUPPORT_MPEG4_TEST
	#undef SHOW_ALI_DEMO_ON_SCREEN
	#undef AUDIO_DESCRIPTION_SUPPORT
	#undef RAM_TMS_TEST
	#undef MULTI_CAS
	#undef CAS_TYPE
	#undef SUPPORT_HW_CONAX
	#undef SUPPORT_CAS9
	#undef SUPPORT_CAS7
	#undef CAS9_PVR_SUPPORT
	#undef CAS7_PVR_SUPPORT
	#undef AV_DELAY_SUPPORT    
	#undef  DSC_SUPPORT
	#undef GB2312_SUPPORT //reduce the space for ota 
	#undef PVR_DYNAMIC_PID_CHANGE_TEST
	#undef WIFI_SUPPORT
	#undef TEMP_INFO_HEALTH
	#undef MULTIVIEW_SUPPORT
	#undef FAST_CHCHG_TEST
    #undef AUTO_UPDATE_TPINFO_SUPPORT
    #undef MULTIFEED_SUPPORT
    #undef CC_ON
    #undef CC_BY_OSD
    #undef CC_BY_VBI
    #undef CC_MONITOR_CS
    #undef CC_MONITOR_CC
#endif

#ifdef _INVW_JUICE
#define AUTO_SYANDBY_DEFAULT_ON
#define _LCN_ENABLE_
#define NETWORK_ID_ENABLE
#define _SERVICE_ATTRIBUTE_ENABLE_
#define  PARENTAL_SUPPORT
#define SUPPORT_NETWORK_NAME
#define SUPPORT_DEFAULT_AUTHORITY
#define UI_NOT_SHOW_BOOT_LOGO

//#undef WATCH_DOG_SUPPORT
#undef AV_DELAY_SUPPORT    
//#undef SHOW_ALI_DEMO_ON_SCREEN
//#undef CI_SUPPORT 
#endif


#ifdef DVBS_SUPPORT
#define SYS_PROJECT_FE				PROJECT_FE_DVBS
#elif ( defined(DVBT_SUPPORT) || defined(DVBT2_SUPPORT) )
#define SYS_PROJECT_FE				PROJECT_FE_DVBT
#elif defined  ISDBT_SUPPORT
#define SYS_PROJECT_FE				PROJECT_FE_ISDBT
#elif defined  DVBC_SUPPORT
#define SYS_PROJECT_FE				PROJECT_FE_DVBC
#else
#error "not define SYS_PROJECT_FE"
#endif

//below need clear
#ifdef DVBC_SUPPORT
    #define DVBC_COUNTRY_BAND_SUPPORT
    #define SHOW_WELCOME_SCREEN  ////need  define DVBC_COUNTRY_BAND_SUPPORT
    #define QAM_ONLY_USAGE   	SYS_FUNC_ON
    #define SYS_DEM_BASE_ADDR  	0x42	//0x40
    #define TUNER_I2C_BYPASS
#endif

#ifdef DVBC_SUPPORT
  #define FE_DVBC_SUPPORT
#endif
#ifdef DVBS_SUPPORT
  #define FE_DVBS_SUPPORT
  #define DISEQC_SUPPORT
#endif

#define PERSIAN_SUPPORT//modify for adding welcome page when only open dvbt 2011 10 17



#if ! defined(SYS_TUN_MODULE)
//Martin@20150324_Support_MXL603
#elif defined (_BOARD_DB_M3811_01V01_)
	#if(AOV_TUN_MODULE == TUNER_MXL603)
    	#define SYS_TUN_MODULE          MXL603 
	#elif(AOV_TUN_MODULE == TUNER_MXL5007)
    	#define SYS_TUN_MODULE          MXL5007 
	#endif
//----End Martin  

#endif

#if defined(I2C_SCB0_RUN_WITH_GPIO_I2C_MODE)
#define SYS_I2C_SDA2	        18  //gpio of I2C_TYPE_SCB0
#define SYS_I2C_SCL2			19  //gpio of I2C_TYPE_SCB0

#define I2C_FOR_TUNER           I2C_TYPE_GPIO2
#define I2C_FOR_HZ6303          I2C_TYPE_GPIO2
#define I2C_FOR_S3501           I2C_TYPE_GPIO2
#else

//#define SYS_I2C_SDA2			SYS_I2C_SDA  //unuseful
//#define SYS_I2C_SCL2			SYS_I2C_SCL  //unuseful

// I2C config same for all M3602 board now
#define I2C_FOR_TUNER           I2C_TYPE_SCB0
#define I2C_FOR_HZ6303          I2C_TYPE_SCB0
#define I2C_FOR_S3501           I2C_TYPE_SCB0
#endif


#ifdef MP_SUBTITLE_SUPPORT
#define MP_SUBTITLE_SETTING_SUPPORT //for mp ext subtitle setting support:font size/fg_color/bg_color/position
#endif

#ifdef _BOARD_DB_M3812_03V01_
//#define ENABLE_SSI1_2_DATA_SWAP 
#define CI_VCCEN_ACTIVE_HIGH
#endif

#ifdef  TEMP_INFO_HEALTH
//#define BACKUP_TEMP_INFO 
#endif

/********************    AOV config   ***********************/
/*Martin@20150127, add AOV_Remote_control*/
#if (AOV_RC_MODEL == ARC010 || AOV_RC_MODEL == ARC019 || AOV_RC_MODEL == ARC020)
	#define IR_KEY_ADDR 	0xc066
#endif

//ChengYu@20130916, add AOV debug print function
//#define	AOV_DEBUG_ENABLE
//#define _DEBUG_VERSION_
//#define _DEBUG_PRINTF_

#define	AOV_HDCP_KEY_ENABLE					SYS_FUNC_OFF
#define AOV_OSD_GAME_ENABLE					SYS_FUNC_OFF
#define AOV_OSD_UPGRADE_USE_RS232_ENABLE	SYS_FUNC_OFF
#define AOV_OSD_DISPLAY_SETTING_ENABLE		SYS_FUNC_ON//ChengYu@20140421, enable display setting
#define AOV_OSD_LCN_ENABLE					SYS_FUNC_ON
#define AOV_OSD_NETWORK_SEARCH_ENABLE		SYS_FUNC_OFF
#define AOV_OSD_CHANNEL_PLAY_TYPE_ENABLE	SYS_FUNC_OFF
#define AOV_EPG_PLAY_CHANNEL_ENABLE			SYS_FUNC_ON
#define AOV_FILELIST_SCROLLING_TEXT			SYS_FUNC_ON
#define AOV_CHANGE_GROUP_ENABLE				SYS_FUNC_OFF
#define AOV_SIGNAL_CALCULATE_ENABLE			SYS_FUNC_ON
#define AOV_THAI_SUPPORT_ENABLE				SYS_FUNC_OFF
#define AOV_VIE_SUPPORT_ENABLE				SYS_FUNC_OFF//ChengYu@20140211, Vietnamese language support
#define AOV_CHS_SUPPORT_ENABLE				SYS_FUNC_OFF//ChengYu@20140303, Chinese(Simplified) font support
#define AOV_MALAY_SUPPORT_ENABLE			SYS_FUNC_OFF//ChengYu@20140421, Malaysia language support
#define AOV_IND_SUPPORT_ENABLE				SYS_FUNC_OFF//ChengYu@20140421, Indonesia language support
#define AOV_ARABIC_SUPPORT_ENABLE			SYS_FUNC_OFF//ChengYu@20140422, Arabic language support
#define AOV_TAMIL_SUPPORT_ENABLE			SYS_FUNC_OFF//ChengYu@20140505, Tamil language support
#define AOV_TIMER_MOD_MON_TO_FRI			SYS_FUNC_ON//ChengYu@20131101, add MON to FRI timer mode support

#define AOV_ALI_IR_ENABLE					SYS_FUNC_OFF//ChengYu@20140512, disable ALi IR

#define AOV_SPAN_SUPPORT_ENABLE				SYS_FUNC_ON//Martin@20150225 Spanish language support
#define AOV_POR_SUPPORT_ENABLE				SYS_FUNC_ON//Martin@20150303 Portugues language support


#define AUTO_SYANDBY_DEFAULT_ON
#define SCART_RGB_UNSUPPORT //ChengYu@20131031, no scart output
#define USBUPG_UPGFILE_FILTER //ChengYu@20140221, for fast upgrade
/************************************************************/

#endif	// __SYS_CONFIG_H
